Abstract: A MOSFET active-disable switch is configured to clip an incoming signal in opposing directions when in an off state. By one approach the clipping is symmetrical and accordingly the switch clips both positive and negative peaks of the incoming signal. In many application settings it is useful for the clipping to serve to decrease a predetermined kind of resultant distortion such as even order distortion. In the on state this MOSFET active-disable switch is configured to not clip the incoming signal in opposing directions.

Abstract: A direct current (DC) bias maintenance circuit operably couples to the input of a primary amplifier. The DC bias maintenance circuit employs feedback to maintain the desired DC bias but lacks any coupling to the output of the primary amplifier. By one approach the DC bias maintenance circuit includes a secondary amplifier that replicates at least some near real-time performance characteristics of the primary amplifier. For example, the secondary amplifier can replicate at least certain DC properties of the primary amplifier such that DC-based changes appearing at the output of the primary amplifier are mirrored at an output of the secondary amplifier notwithstanding a lack of any coupling between the output of the primary amplifier and the DC bias maintenance circuit.

Abstract: A direct current (DC) bias maintenance circuit operably couples to the input of a primary amplifier. The DC bias maintenance circuit employs feedback to maintain the desired DC bias but lacks any coupling to the output of the primary amplifier. By one approach the DC bias maintenance circuit includes a secondary amplifier that replicates at least some near real-time performance characteristics of the primary amplifier. For example, the secondary amplifier can replicate at least certain DC properties of the primary amplifier such that DC-based changes appearing at the output of the primary amplifier are mirrored at an output of the secondary amplifier notwithstanding a lack of any coupling between the output of the primary amplifier and the DC bias maintenance circuit.

Abstract: A MOSFET active-disable switch is configured to clip an incoming signal in opposing directions when in an off state. By one approach the clipping is symmetrical and accordingly the switch clips both positive and negative peaks of the incoming signal. In many application settings it is useful for the clipping to serve to decrease a predetermined kind of resultant distortion such as even order distortion. In the on state this MOSFET active-disable switch is configured to not clip the incoming signal in opposing directions.

Abstract: These teachings provide for detecting an offset voltage corresponding to a circuit element having an input and an output. (The approaches taught herein will accommodate detecting that offset voltage at either the input and/or the output as desired.) Upon detecting the offset voltage a switch that connects the input of the circuit element to ground automatically closes to thereby ground the input. That switch remains open in the absence of detecting an offset voltage.

Abstract: A single-stage buffer apparatus includes a first transistor, a second transistor, and a high pass filter network. The first transistor is configured to receive an input signal from a microphone. The second transistor is configured to operate as a cascode transistor. The high pass filter network is coupled to the first transistor and the second transistor. The second transistor electrically decouples the first transistor from an output of the single-stage buffer apparatus. A gate terminal of the second transistor is driven by the high-pass filter network, and the high-pass filter network is driven by the first transistor.

Abstract: A buffer is coupled to an acoustic motor. The buffer has an input and an output. The input has an input voltage and the output has an output voltage. The buffer is coupled to a load. The buffer includes an input transistor and push-pull transistor circuitry. The input transistor has a gate, a source, and a drain, a gate-to-source capacitance, and an area. The push-pull transistor circuitry is coupled to the input transistor. Under a first set of operating conditions, the gate to source voltage of the input transistor remains constant and the output voltage is a buffered copy of the input voltage. Under a second set of operating conditions, the push-pull transistor circuitry selectively sinks or sources additional current to the load so that linearity of buffer operation is provided. A gate-to-drain capacitance of the input transistor is buffered allowing the area of the input transistor to be increased without reducing the gain of the motor.

Abstract: A buffer is coupled to an acoustic motor. The buffer has an input and an output. The input has an input voltage and the output has an output voltage. The buffer is coupled to a load. The buffer includes an input transistor and push-pull transistor circuitry. The input transistor has a gate, a source, and a drain, a gate-to-source capacitance, and an area. The push-pull transistor circuitry is coupled to the input transistor. Under a first set of operating conditions, the gate to source voltage of the input transistor remains constant and the output voltage is a buffered copy of the input voltage. Under a second set of operating conditions, the push-pull transistor circuitry selectively sinks or sources additional current to the load so that linearity of buffer operation is provided. A gate-to-drain capacitance of the input transistor is buffered allowing the area of the input transistor to be increased without reducing the gain of the motor.

Abstract: A single-stage buffer apparatus includes a first transistor, a second transistor, and a high pass filter network. The first transistor is configured to receive an input signal from a microphone. The second transistor is configured to operate as a cascode transistor. The high pass filter network is coupled to the first transistor and the second transistor. The second transistor electrically decouples the first transistor from an output of the single-stage buffer apparatus. A gate terminal of the second transistor is driven by the high-pass filter network, and the high-pass filter network is driven by the first transistor.

Abstract: According to an example embodiment, an apparatus may include a non-Universal Serial Bus (non-USB) serial interface, a USB connector, a first protection circuit connected between a first data connection of the non-USB serial interface and a first data connection of the USB connector, a second protection circuit connected between a second data connection of the non-USB serial interface and a second data connection of the USB connector, a processor, and a detection circuit connected to the second data connection of the USB connector, the detection circuit configured to output a signal to the processor indicating an attachment or connection of a second non-USB serial interface to the USB connector.

Abstract: In one general aspect, a system may include a circuit board, a first integrated circuit attached to the circuit board, and a second integrated circuit attached to the circuit board being separate from the first integrated circuit and configured to operate in multiple power domains that include at least a core power domain and an I/O power domain and that is configured with a logic gate to receive and process external requests from the first integrated circuit and internal requests from the second integrated circuit for a common external resource.

Abstract: In one general aspect, a system may include a circuit board, a first integrated circuit attached to the circuit board, and a second integrated circuit attached to the circuit board being separate from the first integrated circuit and configured to operate in multiple power domains that include at least a core power domain and an I/O power domain and that is configured with a logic gate to receive and process external requests from the first integrated circuit and internal requests from the second integrated circuit for a common external resource.

Abstract: A racing sulky, including an arch including a transverse member and a pair of struts, a pair of rails adjacent the arch, the struts extending downwardly and forwardly from the transverse member, wherein the transverse member defining a main plane, supported on the plane being oriented substantially parallel to a ground plane, and a wheel rotatably supported on each of the struts.

Abstract: A racing sulky to be drawn by a horse, the sulky including a pair of rails (12) each having a first end (16) and a second end (18). From the second end (18), a first segment (28) extends forwardly and inwardly, a second segment (30) extends forwardly and outwardly from the first segment (28) and creates a first bend (22) therebetween. A third segment (32) extends inwardly toward a centerline CL from second segment (30) and creates a second bend (24) therebetween. The first, second, and third segments (28, 30, and 32) extend upwardly at the same angle, and a fourth segment (34) extends forwardly, outwardly, and downwardly from the third segment (32) terminating at the first end (16). A transverse member (36) spans the rails (12) and is attached to the second ends (18) of the rails (12). The transverse member (36) extends laterally beyond the second ends (18), and terminates in a pair of transverse member ends (38).