Patents by Inventor Craig Twardy

Craig Twardy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for assuring counterbore depth of vias on printed circuit boards and printed circuit boards made accordingly
    Patent number: 8431834
    Abstract: A method is disclosed for fabricating a PCB so that is can easily be determined if a via in the PCB has not been counterbored to a desired depth. A PCB fabricated according to the method also is disclosed.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: April 30, 2013
    Assignee: Ciena Corporation
    Inventors: Craig Twardy, Robert McDonald
  • METHOD FOR ASSURING COUNTERBORE DEPTH OF VIAS ON PRINTED CIRCUIT BOARDS AND PRINTED CIRCUIT BOARDS MADE ACCORDINGLY
    Publication number: 20100314163
    Abstract: A method is disclosed for fabricating a PCB so that is can easily be determined if a via in the PCB has not been counterbored to a desired depth. A PCB fabricated according to the method also is disclosed.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 16, 2010
    Applicant: Nortel Networks Limited
    Inventors: Craig Twardy, Robert McDonald
  • Electrical isolation of PCBs gasketing using controlled depth drilling
    Publication number: 20070114056
    Abstract: A method of electrical isolation for printed circuit board gasketing is disclosed for enabling gasketing to overlay plated through holes without shorting out thereto. The method of electrical isolation for printed circuit board gasketing includes counterboring at a controlled width to a controlled depth those plated through holes underlying the gasketing. The method provides the advantage of being able to overlay gasketing on both surfaces of a printed circuit board mid-plane. The method of electrical isolation for printed circuit board gasketing is particularly useful for overcoming the additional material requirements and processing steps of electrical isolation known in the art.
    Type: Application
    Filed: June 9, 2004
    Publication date: May 24, 2007
    Inventors: Lloyd Cosman, Farid Aziz, Craig Twardy, Simon Shearman, Edmund Gillespie, Joan Wang, Michael Tabatchnik, Marko Nicolici, Robert McDonald
  • Electrical isolation of PCBs gasketing using controlled depth drilling
    Publication number: 20050274544
    Abstract: A method of electrical isolation for printed circuit board gasketing is disclosed for enabling gasketing to overlay plated through holes without shorting out thereto. The method of electrical isolation for printed circuit board gasketing includes counterboring at a controlled width to a controlled depth those plated through holes underlying the gasketing. The method provides the advantage of being able to overlay gasketing on both surfaces of a printed circuit board mid-plane. The method of electrical isolation for printed circuit board gasketing is particularly useful for overcoming the additional material requirements and processing steps of electrical isolation known in the art.
    Type: Application
    Filed: June 9, 2004
    Publication date: December 15, 2005
    Inventors: Lloyd Cosman, Farid Aziz, Craig Twardy, Simon Shearman, Edmund Gillespie, Joan Wang, Michael Tabatchnik, Marko Nicolici, Robert McDonald