Abstract: Described apparatuses and methods relate to erroneous select die access (SDA) detection for a memory system. A memory system may include a memory controller and a memory device that are capable of implementing an SDA protocol that enables selective memory die access to multiple memory devices that couple to a command bus. A memory device can include logic that determines if signaling that conflicts with the SDA protocol is detected. If it is determined that conflicting signaling is detected, the logic may provide an indication of the conflicted signaling. In doing so, the erroneous SDA detection described herein may reduce the likelihood of a memory device erroneously masking memory dice, thereby limiting the memory device from exhibiting unexpected, and in some cases, dangerous behavior.

Abstract: Described apparatuses and methods facilitate bus training with multiple dice, such as multiple memory dice. A controller can communicate with multiple dice to perform bus training by sending a test pattern and receiving in return a feedback pattern indicative of the bits detected by the dice. Because suitable signal timing can differ between dice, even those using the same bus, a controller may train each die separately from the others. In some situations, however, individualized training may be infeasible. To accommodate such situations, logic associated with two or more dice can combine, using at least one logical operation, bits as detected from the test pattern into a combined feedback pattern. A timing parameter that is jointly suitable for multiple dice can be determined, and the bus training may be concluded, responsive to the combined feedback pattern matching the test pattern. The multiple dice may be stacked or linked.