Abstract: A radiation hardened MOS structure is integrated on a semiconductor substrate. The structure includes a MOS transistor realized in an active area surrounded by an isolation layer. The MOS transistor includes a channel region delimited by opposed source and drain regions of a first type of conductivity and a gate region formed above the channel and insulated from it by a thin oxide layer. The radiation hardened MOS structure includes a guard ring element of a second type of conductivity, formed in the semiconductor substrate under the isolation layer. The source and drain regions are spaced away from the isolation layer.