Patents by Inventor Crispulo Estira Lictao, JR.

Crispulo Estira Lictao, JR. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230343683
    Abstract: A method of manufacturing a packaged semiconductor device is provided. The method includes affixing a sensor system to a die pad portion of a leadframe. A battery is affixed to the lead frame including a first terminal of the battery affixed to a first leg of the leadframe and a second terminal of the battery affixed to a second leg of the leadframe. An encapsulant encapsulates the sensor system, battery, and leadframe.
    Type: Application
    Filed: April 26, 2022
    Publication date: October 26, 2023
    Inventors: Stephen Ryan Hooper, Chanon Suwankasab, Chayathorn Saklang, Crispulo Estira Lictao, JR., Amornthep Saiyajitara, Dominic (PohMeng) Koey
  • Patent number: 11482478
    Abstract: An electronic device package includes a first die coupled to a substrate, a second die coupled with the first die, and a spacer element coupled to the second die to form a stacked structure that includes the first die, the second die, and the spacer element. An electrically conductive shield overlies the stacked structure. The shield has a first end coupled to the spacer element and a second end coupled to the substrate. Inter-chip bond wires may electrically interconnect the first and second dies, and the shield may additionally overlie the bond wires. The spacer element may extend above a surface of the second die at a height that is sufficient to prevent the shield from touching the inter-chip bond wires.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: October 25, 2022
    Assignee: NXP B.V.
    Inventors: Crispulo Estira Lictao, Jr., Chayathorn Saklang, Amornthep Saiyajitara, Chanon Suwankasab, Stephen Ryan Hooper, Bernd Offermann
  • Publication number: 20220028766
    Abstract: An electronic device package includes a first die coupled to a substrate, a second die coupled with the first die, and a spacer element coupled to the second die to form a stacked structure that includes the first die, the second die, and the spacer element. An electrically conductive shield overlies the stacked structure. The shield has a first end coupled to the spacer element and a second end coupled to the substrate. Inter-chip bond wires may electrically interconnect the first and second dies, and the shield may additionally overlie the bond wires. The spacer element may extend above a surface of the second die at a height that is sufficient to prevent the shield from touching the inter-chip bond wires.
    Type: Application
    Filed: July 23, 2020
    Publication date: January 27, 2022
    Inventors: Crispulo Estira Lictao, JR., Chayathorn Saklang, Amornthep Saiyajitara, Chanon Suwankasab, Stephen Ryan Hooper, Bernd Offermann
  • Patent number: 10297500
    Abstract: A method of dicing a bowed or warped semiconductor wafer includes cutting along the saw streets in a first direction on a first half of the wafer, where the first direction is parallel to the bowing, cutting along the saw streets in the first direction on a second half of the wafer opposite to the first half, and step-cutting along the saw streets in the second direction, such that all of the dies are separated from each other, and the sides of the die in the bowing direction are flat and the sides of the die perpendicular to the bowing direction are stepped.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: May 21, 2019
    Assignee: Nexperia B.V.
    Inventors: Crispulo Estira Lictao, Jr., Pitak Seantumpol, Siriluck Wongratanaporngoorn, Matthew Mondala Fernandez, Amileth Dejan Cabrera
  • Publication number: 20180174907
    Abstract: A method of dicing a bowed or warped semiconductor wafer includes cutting along the saw streets in a first direction on a first half of the wafer, where the first direction is parallel to the bowing, cutting along the saw streets in the first direction on a second half of the wafer opposite to the first half, and step-cutting along the saw streets in the second direction, such that all of the dies are separated from each other, and the sides of the die in the bowing direction are flat and the sides of the die perpendicular to the bowing direction are stepped.
    Type: Application
    Filed: December 15, 2016
    Publication date: June 21, 2018
    Inventors: Crispulo Estira Lictao, JR., Pitak Seantumpol, Siriluck Wongratanaporngoorn, Matthew Mondala Fernandez, Amileth Dejan Cabrera