Patents by Inventor Cristian Garbossa

Cristian Garbossa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11863080
    Abstract: An active-clamped isolated SEPIC DC-DC power converter (ACISC) to convert a DC voltage to supply a variety of DC loads. The single-ended primary-inductor converter (SEPIC) of the ACISC may be configured to perform both buck and boost converter functions. The ACISC of this disclosure may be configured to operate over a wide input voltage range to provide an output voltage for DC electronic loads supplied by the power converter. In the example of an automobile, a back-up twelve volt battery may output voltages to the ACISC over a wide voltage range, e.g., nine volts to eighteen volts. The wide input voltage range of the ACISC may be desirable when used as the converter for a back-up battery supply. The circuitry arrangement and component selection of the ACISC of this disclosure cause the power converter to operate in resonant DCM mode in the megahertz (MHz) frequency range.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: January 2, 2024
    Assignees: Infineon Technologies AG, Università Degli Studi di Padova
    Inventors: Stefano Cabizza, Giorgio Spiazzi, Cristian Garbossa
  • Patent number: 11855444
    Abstract: A system topology may use intentional signal injection to monitor one or more power supply circuits that may supply electrical power to components of the system. The system topology may include voltage monitoring circuitry to monitor the output of the power supply. In some examples, a power supply rail fault may happen either inside or outside of the power supply circuit, but not be detectable by the voltage monitoring circuitry. Injecting a check signal in the presence of an actual fault, may cause oscillations at the output node of the power supply detectable by the voltage monitoring circuitry. Once the check signal, combined with the fault signal, at the output node reaches the monitoring threshold detectable by the voltage monitoring circuitry, the voltage monitoring circuitry may output an indication of the fault to processing circuitry of the system.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: December 26, 2023
    Assignee: Infineon Technologies AG
    Inventors: Ozan Serpedin, Cristian Garbossa
  • Patent number: 11804775
    Abstract: In some examples, a device includes a selector circuit configured to deliver power to a first driver circuit, where the first driver circuit is configured to activate and deactivate a first switch of a postregulator. The device also includes a startup regulator and a controller configured to cause the selector circuit to deliver power from the startup regulator to the first driver circuit. The controller is also configured to determine that a boost regulator is operational after delivering power from the startup regulator to the first driver circuit. The controller is further configured to cause the selector circuit to deliver power from the boost regulator to the first driver circuit in response to determining that the boost regulator is operational.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: October 31, 2023
    Assignee: Infineon Technologies AG
    Inventors: Cristian Garbossa, Alberto Arpino, Michele Bergo, Dario Cappuzzo, Bogdan Dimitriu, Vlad Alexandru Mircea Ionescu, Paola Lops, Luca Scandola, Ozan Serpedin, Silvia Solda
  • Publication number: 20230318472
    Abstract: An active-clamped isolated SEPIC DC-DC power converter (ACISC) to convert a DC voltage to supply a variety of DC loads. The single-ended primary-inductor converter (SEPIC) of the ACISC may be configured to perform both buck and boost converter functions. The ACISC of this disclosure may be configured to operate over a wide input voltage range to provide an output voltage for DC electronic loads supplied by the power converter. In the example of an automobile, a back-up twelve volt battery may output voltages to the ACISC over a wide voltage range, e.g., nine volts to eighteen volts. The wide input voltage range of the ACISC may be desirable when used as the converter for a back-up battery supply. The circuitry arrangement and component selection of the ACISC of this disclosure cause the power converter to operate in resonant DCM mode in the megahertz (MHz) frequency range.
    Type: Application
    Filed: February 15, 2022
    Publication date: October 5, 2023
    Applicant: Università degli Studi di Padova
    Inventors: Stefano Cabizza, Giorgio Spiazzi, Cristian Garbossa
  • Patent number: 11682962
    Abstract: This disclosure includes systems, methods, and techniques for controlling a semiconductor device of a power converter. For example, a circuit includes first control circuitry configured to receive an indication of a first voltage which represents a voltage output from a power source to the power converter. Additionally, the first control circuitry is configured to output a control signal to second control circuitry in order to control, based on the first voltage and the second voltage, the semiconductor device so that a second voltage is lower than the first voltage, wherein the second voltage represents a voltage output from the power converter to a load.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: June 20, 2023
    Assignee: Infineon Technologies AG
    Inventors: Alberto Arpino, Michele Bergo, Cristian Garbossa, Luca Scandola
  • Patent number: 11652400
    Abstract: A method of operating a power protection system coupled between a power source and a power converter includes producing, by a controller of the power protection system, a driving signal to a cut-off switch of the power protection system to electrically couple the power source to the power converter; detecting, by the controller of the power protection system, a fault condition of the power converter while the power converter is in operation, where the detecting includes detecting, by the controller of the power protection system, that a current flowing through the cut-off switch is above a pre-determined threshold while a gate control signal from the power converter indicates an OFF state for a first current path of the power converter; and in response to detecting the fault condition, turning off, by the controller of the power protection system, the cut-off switch to isolate the power source from the power converter.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: May 16, 2023
    Assignee: Infineon Technologies AG
    Inventors: Cristian Garbossa, Enrico Orietti
  • Patent number: 11552544
    Abstract: A circuit may be configured detect current in different phases of an N-phase power converter. The circuit may comprise a first set of elements defining at least part of a first current loop associated with a first phase of the power converter, wherein the first set of elements is configured to detect current during the first phase of the power converter. In addition, the circuit may comprise a second set of elements defining at least part of a second current loop associated with a second phase of the power converter, wherein the second set of elements is configured to detect current during the second phase of the power converter when a duty cycle associated with the different phases is greater than 100/N, and wherein the first set of elements is configured to detect current during the second phase of the power converter when the duty cycle is less than 100/N.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: January 10, 2023
    Assignee: Infineon Technologies AG
    Inventors: Luca Scandola, Cristian Garbossa
  • Patent number: 11545887
    Abstract: This disclosure describes a protection circuit configured to protect a power converter. The protection circuit may be configured to determine when the power converter is operating in a tristate mode, and upon determining that the power converter is operating in the tristate mode, to disable a supply to the power converter based on a comparison of a switch node voltage on a switch node of the power converter to a feedback node voltage on an output node of the power converter.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: January 3, 2023
    Assignee: Infineon Technologies AG
    Inventors: Vlad Alexandru Mircea Ionescu, Cristian Garbossa, Andrea Zuccollo
  • Publication number: 20220368210
    Abstract: This disclosure includes systems, methods, and techniques for controlling a semiconductor device of a power converter. For example, a circuit includes first control circuitry configured to receive an indication of a first voltage which represents a voltage output from a power source to the power converter. Additionally, the first control circuitry is configured to output a control signal to second control circuitry in order to control, based on the first voltage and the second voltage, the semiconductor device so that a second voltage is lower than the first voltage, wherein the second voltage represents a voltage output from the power converter to a load.
    Type: Application
    Filed: April 27, 2021
    Publication date: November 17, 2022
    Inventors: Alberto Arpino, Michele Bergo, Cristian Garbossa, Luca Scandola
  • Patent number: 11493982
    Abstract: Systems, methods, and circuitries are provided for controlling a microcontroller (MCU) on a per-application basis. A control system includes a microcontroller unit (MCU) including a first application group and a second application group. The first application group includes at least one hardware component not associated with the second application group. The control system includes a power management integrated circuit (PMIC). The PMIC includes monitoring circuitry configured to monitor the first application group to detect a first application group fault condition and monitor the second application group to detect a second application group fault condition. Based on the monitoring, the PMIC provides a first reset signal to the first application group that does not reset the second application group or provides a second reset signal to the second application group that does not reset the first application group.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: November 8, 2022
    Assignee: Infineon Technologies AG
    Inventors: Konstantin Ivanchenko, Cristian Garbossa, Bejoy Mathews
  • Publication number: 20220345039
    Abstract: In some examples, a device includes a selector circuit configured to deliver power to a first driver circuit, where the first driver circuit is configured to activate and deactivate a first switch of a postregulator. The device also includes a startup regulator and a controller configured to cause the selector circuit to deliver power from the startup regulator to the first driver circuit. The controller is also configured to determine that a boost regulator is operational after delivering power from the startup regulator to the first driver circuit. The controller is further configured to cause the selector circuit to deliver power from the boost regulator to the first driver circuit in response to determining that the boost regulator is operational.
    Type: Application
    Filed: April 27, 2021
    Publication date: October 27, 2022
    Inventors: Cristian Garbossa, Alberto Arpino, Michele Bergo, Dario Cappuzzo, Bogdan Dimitriu, Vlad Alexandru Mircea Ionescu, Paola Lops, Luca Scandola, Ozan Serpedin, Silvia Solda
  • Publication number: 20220345024
    Abstract: A circuit may be configured detect current in different phases of an N-phase power converter. The circuit may comprise a first set of elements defining at least part of a first current loop associated with a first phase of the power converter, wherein the first set of elements is configured to detect current during the first phase of the power converter. In addition, the circuit may comprise a second set of elements defining at least part of a second current loop associated with a second phase of the power converter, wherein the second set of elements is configured to detect current during the second phase of the power converter when a duty cycle associated with the different phases is greater than 100/N, and wherein the first set of elements is configured to detect current during the second phase of the power converter when the duty cycle is less than 100/N.
    Type: Application
    Filed: April 27, 2021
    Publication date: October 27, 2022
    Inventors: Luca Scandola, Cristian Garbossa
  • Publication number: 20220337149
    Abstract: This disclosure describes a protection circuit configured to protect a power converter. The protection circuit may be configured to determine when the power converter is operating in a tristate mode, and upon determining that the power converter is operating in the tristate mode, to disable a supply to the power converter based on a comparison of a switch node voltage on a switch node of the power converter to a feedback node voltage on an output node of the power converter.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 20, 2022
    Inventors: Vlad Alexandru Mircea Ionescu, Cristian Garbossa, Andrea Zuccollo
  • Publication number: 20220329060
    Abstract: A system topology may use intentional signal injection to monitor one or more power supply circuits that may supply electrical power to components of the system. The system topology may include voltage monitoring circuitry to monitor the output of the power supply. In some examples, a power supply rail fault may happen either inside or outside of the power supply circuit, but not be detectable by the voltage monitoring circuitry. Injecting a check signal in the presence of an actual fault, may cause oscillations at the output node of the power supply detectable by the voltage monitoring circuitry. Once the check signal, combined with the fault signal, at the output node reaches the monitoring threshold detectable by the voltage monitoring circuitry, the voltage monitoring circuitry may output an indication of the fault to processing circuitry of the system.
    Type: Application
    Filed: April 9, 2021
    Publication date: October 13, 2022
    Inventors: Ozan Serpedin, Cristian Garbossa
  • Publication number: 20220229486
    Abstract: Systems, methods, and circuitries are provided for controlling a microcontroller (MCU) on a per-application basis. A control system includes a microcontroller unit (MCU) including a first application group and a second application group. The first application group includes at least one hardware component not associated with the second application group. The control system includes a power management integrated circuit (PMIC). The PMIC includes monitoring circuitry configured to monitor the first application group to detect a first application group fault condition and monitor the second application group to detect a second application group fault condition. Based on the monitoring, the PMIC provides a first reset signal to the first application group that does not reset the second application group or provides a second reset signal to the second application group that does not reset the first application group.
    Type: Application
    Filed: January 20, 2021
    Publication date: July 21, 2022
    Inventors: Konstantin Ivanchenko, Cristian Garbossa, Bejoy Mathews
  • Patent number: 11329618
    Abstract: Differential control circuitry configured to control the operation of a power converter. The control circuitry of this disclosure is configured to receive two differential feedback signals from a fully differential amplifier. The amplifier receives an output voltage (Vout) from the switched mode power supply as well as a reference voltage (Vref). When Vout is less than Vref, the control circuitry may output a pulse width modulation (PWM) control signal to the switched mode power supply with a duty cycle of the PWM control signal based on a relative difference between a positive difference voltage and a negative difference voltage. When Vout is greater than Vref, the control circuitry may output a pulse frequency modulation (PFM) control signal to the switched mode power supply with a switching time of the PFM control signal based on a relative difference between the positive difference voltage and the negative difference voltage.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: May 10, 2022
    Assignee: Infineon Technologies AG
    Inventors: Davide Dal Bianco, Cristian Garbossa
  • Publication number: 20220094318
    Abstract: Differential control circuitry configured to control the operation of a power converter. The control circuitry of this disclosure is configured to receive two differential feedback signals from a fully differential amplifier. The amplifier receives an output voltage (Vout) from the switched mode power supply as well as a reference voltage (Vref). When Vout is less than Vref, the control circuitry may output a pulse width modulation (PWM) control signal to the switched mode power supply with a duty cycle of the PWM control signal based on a relative difference between a positive difference voltage and a negative difference voltage. When Vout is greater than Vref, the control circuitry may output a pulse frequency modulation (PFM) control signal to the switched mode power supply with a switching time of the PFM control signal based on a relative difference between the positive difference voltage and the negative difference voltage.
    Type: Application
    Filed: September 22, 2020
    Publication date: March 24, 2022
    Inventors: Davide Dal Bianco, Cristian Garbossa
  • Publication number: 20220066491
    Abstract: A circuit configured to perform low-dropout regulation of an output voltage includes a first buffer, a second buffer, controller circuitry, and switching circuitry. The first buffer includes a first driving element configured to provide a first current into a first output node based on the output voltage. The first bias circuitry is configured to bias the first current. The second buffer includes a second driving element configured to provide a second current into a second output node based on a voltage at the first output node. The second bias circuitry is configured to bias the second current. The controller circuitry is configured to generate a control signal based on a current at the pass device and switching circuitry configured to electrically couple the first output node to the control node of the pass device based on the control signal.
    Type: Application
    Filed: September 1, 2020
    Publication date: March 3, 2022
    Inventors: Ionut-Alin Ilie, Cristian Garbossa, Cristian Stefan Zegheru
  • Patent number: 11243553
    Abstract: A circuit configured to perform low-dropout regulation of an output voltage includes a first buffer, a second buffer, controller circuitry, and switching circuitry. The first buffer includes a first driving element configured to provide a first current into a first output node based on the output voltage. The first bias circuitry is configured to bias the first current. The second buffer includes a second driving element configured to provide a second current into a second output node based on a voltage at the first output node. The second bias circuitry is configured to bias the second current. The controller circuitry is configured to generate a control signal based on a current at the pass device and switching circuitry configured to electrically couple the first output node to the control node of the pass device based on the control signal.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: February 8, 2022
    Assignee: Infineon Technologies AG
    Inventors: Ionut-Alin Ilie, Cristian Garbossa, Cristian Stefan Zegheru
  • Publication number: 20220037991
    Abstract: A method of operating a power protection system coupled between a power source and a power converter includes producing, by a controller of the power protection system, a driving signal to a cut-off switch of the power protection system to electrically couple the power source to the power converter; detecting, by the controller of the power protection system, a fault condition of the power converter while the power converter is in operation, where the detecting includes detecting, by the controller of the power protection system, that a current flowing through the cut-off switch is above a pre-determined threshold while a gate control signal from the power converter indicates an OFF state for a first current path of the power converter; and in response to detecting the fault condition, turning off, by the controller of the power protection system, the cut-off switch to isolate the power source from the power converter.
    Type: Application
    Filed: October 15, 2021
    Publication date: February 3, 2022
    Inventors: Cristian Garbossa, Enrico Orietti