Abstract: A multi-cavity package includes a single metal flange having first and second opposing main surfaces. The multi-cavity package also includes a dielectric material attached to the first main surface of the single metal flange. The dielectric material includes a first surface facing the single metal flange, and a second surface facing away from the first surface. The dielectric material also includes a plurality of openings exposing different regions of the first main surface of the single metal flange. The dielectric material also includes a lateral extension that overhangs the single metal flange. A corresponding method of manufacturing is also provided.

Abstract: A multi-cavity package includes a single metal flange having first and second opposing main surfaces. The multi-cavity package also includes a circuit board attached to the first main surface of the single metal flange. The circuit board includes a first surface facing the single metal flange, and a second surface facing away from the first surface. The circuit board also includes a plurality of openings exposing different regions of the first main surface of the single metal flange. The circuit board also includes a lateral extension that overhangs the single metal flange. A corresponding method of manufacturing is also provided.

Abstract: A semiconductor device includes a metal base, a transistor die mounted on the metal base, a lid over the transistor die, and a multilayer printed circuit board electrically connected to the transistor die. The multilayer printed circuit board comprises a first portion positioned between the lid and the metal base, a second portion positioned outside of the lid, a plurality of embedded conductive layers, an embedded dielectric layer disposed between at least two of the plurality of embedded conductive layers, and at least one embedded reactive component formed from at least one of the embedded conductive layers.

Abstract: A transceiver circuit having a T-coil circuit, inductive termination, and an equalization circuit is disclosed. The transceiver includes a transmitter having an output coupled to a first node, and a receiver having an input coupled to the first node. A T-coil circuit is coupled between the first node and an input/output (I/O) node. The T-coil circuit includes first and second inductors coupled in series between the first node and the I/O node, the inductors being coupled at a second node. A termination circuit is coupled between the first node and a reference node, the termination circuit including a third inductor. The transceiver circuit also includes an equalization circuit configured to convey an equalization signal to the second node.

Abstract: A semiconductor device includes a metal base, a transistor die mounted on the metal base, a lid over the transistor die, and a multilayer printed circuit board electrically connected to the transistor die. The multilayer printed circuit board comprises a first portion positioned between the lid and the metal base, a second portion positioned outside of the lid, a plurality of embedded conductive layers, an embedded dielectric layer disposed between at least two of the plurality of embedded conductive layers, and at least one embedded reactive component formed from at least one of the embedded conductive layers.

Abstract: A Doherty amplifier includes a metal baseplate having a die attach region and a peripheral region; a main amplifier and one or more peaking amplifiers, each amplifier comprising a transistor die that includes at least one RF terminal; and a multilayer circuit board having a first side attached to the peripheral region and a second side facing away from the baseplate. The circuit board includes two embedded electrically conductive layers separated from the two sides by respective composite fiber layers, and an embedded dielectric layer disposed between the embedded electrically conductive layers and having a higher dielectric constant than either of the composite fiber layers. The Doherty amplifier also includes an RF impedance matching network that is electrically connected to an RF terminal of at least one amplifier transistor die, and that comprises one or more reactive components formed from at least one of the embedded electrically conductive layers.

Abstract: A multi-cavity package includes a single metal flange having first and second opposing main surfaces. The multi-cavity package also includes a circuit board attached to the first main surface of the single metal flange. The circuit board includes a first surface facing the single metal flange, and a second surface facing away from the first surface. The circuit board also includes a plurality of openings exposing different regions of the first main surface of the single metal flange. The circuit board also includes a lateral extension that overhangs the single metal flange. A corresponding method of manufacturing is also provided.

Abstract: A multi-cavity package includes a single metal flange having first and second opposing main surfaces, a circuit board attached to the first main surface of the single metal flange, the circuit board having a plurality of openings which expose different regions of the first main surface of the single metal flange, and a plurality of semiconductor dies each of which is disposed in one of the openings in the circuit board and attached to the first main surface of the single metal flange. The circuit board includes a plurality of metal traces for electrically interconnecting the semiconductor dies to form a circuit. A corresponding method of manufacturing is also provided.

Abstract: A Doherty amplifier includes a metal baseplate having a die attach region and a peripheral region; a main amplifier and one or more peaking amplifiers, each amplifier comprising a transistor die that includes at least one RF terminal; and a multilayer circuit board having a first side attached to the peripheral region and a second side facing away from the baseplate. The circuit board includes two embedded electrically conductive layers separated from the two sides by respective composite fiber layers, and an embedded dielectric layer disposed between the embedded electrically conductive layers and having a higher dielectric constant than either of the composite fiber layers. The Doherty amplifier also includes an RF impedance matching network that is electrically connected to an RF terminal of at least one amplifier transistor die, and that comprises one or more reactive components formed from at least one of the embedded electrically conductive layers.

Abstract: A semiconductor package includes a metal baseplate having a die attach region and a peripheral region, a transistor die having a reference terminal attached to the die attach region and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the peripheral region and a second side facing away from the baseplate. The multilayer circuit board includes two embedded electrically conductive layers that are separated from the first and second sides by layers of composite fiber, and an embedded dielectric layer disposed between the two embedded electrically conductive layers. The embedded dielectric layer has a higher dielectric constant than the layers of composite fiber.

Abstract: A semiconductor includes a semiconductor substrate having first and second opposite facing surfaces. An amplifier device is formed in the semiconductor substrate, the amplifier device is configured to amplify an RF signal at a fundamental frequency. A first dielectric layer is formed on the first surface of the substrate. A first metallization layer is formed on the first dielectric layer. The first metallization layer is spaced apart from the substrate by the first dielectric layer. The first metallization layer includes a first elongated finger interdigitated with a first reference potential pad. The first elongated finger is physically disconnected from the first reference potential pad. The first reference potential pad includes a first patterned shape that is devoid of metallization. The first patterned shape has a geometry that filters harmonic components of the fundamental frequency.

Abstract: A semiconductor package includes a metal baseplate having a die attach region and a peripheral region, a transistor die having a reference terminal attached to the die attach region and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the peripheral region and a second side facing away from the baseplate. The multilayer circuit board includes two embedded electrically conductive layers that are separated from the first and second sides by layers of composite fiber, and an embedded dielectric layer disposed between the two embedded electrically conductive layers. The embedded dielectric layer has a higher dielectric constant than the layers of composite fiber.

Abstract: A semiconductor package includes a metal baseplate, a semiconductor die having a reference terminal attached to the baseplate and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the baseplate and a second side facing away from the baseplate. The multilayer circuit board includes a plurality of interleaved signal and ground layers. One of the signal layers is at the second side of the multilayer circuit board and electrically connected to the RF terminal of the semiconductor die. One of the ground layers is at the first side of the multilayer circuit board and attached to the metal baseplate. Power distribution structures are formed in the signal layer at the second side of the multilayer circuit board. RF matching structures are formed in a different one of the signal layers than the power distribution structures.

Abstract: A semiconductor package includes a metal baseplate, a semiconductor die having a reference terminal attached to the baseplate and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the baseplate and a second side facing away from the baseplate. The multilayer circuit board includes a plurality of interleaved signal and ground layers. One of the signal layers is at the second side of the multilayer circuit board and electrically connected to the RF terminal of the semiconductor die. One of the ground layers is at the first side of the multilayer circuit board and attached to the metal baseplate. Power distribution structures are formed in the signal layer at the second side of the multilayer circuit board. RF matching structures are formed in a different one of the signal layers than the power distribution structures.

Abstract: A multi-cavity package includes a single metal flange having first and second opposing main surfaces, a circuit board attached to the first main surface of the single metal flange, the circuit board having a plurality of openings which expose different regions of the first main surface of the single metal flange, and a plurality of semiconductor dies each of which is disposed in one of the openings in the circuit board and attached to the first main surface of the single metal flange. The circuit board includes a plurality of metal traces for electrically interconnecting the semiconductor dies to form a circuit. A corresponding method of manufacturing is also provided.