Abstract: A method of managing load units of executable instructions between internal memory in a microcontroller with multiple bus masters, and a non-volatile memory device external to the microcontroller. A copy of the load units are loaded from the external memory device into the internal memory for use by corresponding bus masters. Each load unit is with a corresponding load entity queue and each load entity queue is associated with a corresponding one of the multiple bus masters. Each load entity queue selects an eviction candidate from the associated copy of the load units currently loaded in the internal memory. Information identifying the eviction candidate for each load entity queue is broadcasted to all load entity queues. The eviction candidate is added to a set of managed eviction candidates if none of the load entity queues vetoes using the eviction candidate.

Abstract: A method of managing load units of executable instructions between internal memory in a microcontroller with multiple bus masters, and a non-volatile memory device external to the microcontroller. A copy of the load units are loaded from the external memory device into the internal memory for use by corresponding bus masters. Each load unit is with a corresponding load entity queue and each load entity queue is associated with a corresponding one of the multiple bus masters. Each load entity queue selects an eviction candidate from the associated copy of the load units currently loaded in the internal memory. Information identifying the eviction candidate for each load entity queue is broadcasted to all load entity queues. The eviction candidate is added to a set of managed eviction candidates if none of the load entity queues vetoes using the eviction candidate.

Abstract: Systems and methods of managing variable size load units of application codes in a processing system include identifying pages of a random access memory (RAM) device to store copies of load units from an external memory device upon request by a bus master in the processing system. The RAM device is internal to an integrated circuit device that includes the bus masters, and the external memory device is external to the integrated circuit device. The bus masters execute the application codes, and each of the application codes comprise one or more load units that include executable program instructions. At least some of the load units have different sizes from one another. A page type indicator is determined for an identified page. A first page type indicates whether the identified page is a split page to store a segment of each of two different load units.