Patents by Inventor Cristiano Meroni

Cristiano Meroni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200350877
    Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.
    Type: Application
    Filed: July 22, 2020
    Publication date: November 5, 2020
    Inventors: Edoardo Botti, Tommaso Barbieri, Davide Luigi Brambilla, Cristiano Meroni
  • Publication number: 20200285259
    Abstract: A voltage regulator circuit includes a first voltage regulator having a first output voltage selection pin set and producing a first output voltage based on a first digital signal received at the first output voltage selection pin set, and a second voltage regulator having a second output voltage selection pin set and producing a second output voltage based on a second digital signal received at the second output voltage selection pin set. The first and second voltage regulators are operable in a voltage tracking mode with the output voltage of the second voltage regulator tracking the output voltage of the first voltage regulator when digital signals received at the selection pin sets have a same value. An overvoltage sensor detects overvoltage events at the first voltage regulator. Control circuitry selectively avoids operation in voltage tracking mode as a result of an overvoltage event detected at the first voltage regulator.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 10, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Giovanni Luca TORRISI, Salvatore ABBISSO, Cristiano MERONI
  • Patent number: 10763803
    Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: September 1, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Edoardo Botti, Tommaso Barbieri, Davide Luigi Brambilla, Cristiano Meroni
  • Publication number: 20200112164
    Abstract: A circuit includes processing circuitry is sensitive to a regulated voltage at the output node and to a temperature of the circuit. The processing circuit is configured to provide voltage and temperature sensing signals indicative of the regulated voltage at the output node and the temperature of the circuit. The processing circuitry is configured to assume i) a first state, as a result of the voltage sensing signal reaching a voltage threshold, ii) a second state, as a result of the temperature detection signal reaching a temperature threshold, or iii) a third state, as a result of both the voltage and the temperature sensing signals failing to reach the thresholds. The circuit comprises a warning output coupled to a warning signal generation network controlled by the processing circuitry.
    Type: Application
    Filed: September 30, 2019
    Publication date: April 9, 2020
    Inventors: Giovanni Luca Torrisi, Salvatore Abbisso, Cristiano Meroni
  • Publication number: 20190245498
    Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.
    Type: Application
    Filed: February 6, 2019
    Publication date: August 8, 2019
    Inventors: Edoardo Botti, Tommaso Barbieri, Davide Luigi Brambilla, Cristiano Meroni
  • Patent number: 10050595
    Abstract: A circuit can be used in a speaker system. The circuit includes an amplifier with an output configured to be coupled to a speaker. An offset comparator has an input coupled the output of the amplifier and is configured to provide an offset control signal. A digital circuit has a first input coupled to an output of the offset comparator, a second input configured to receive an amplifier control signal, a third input configured to receive a play control signal, and an output configured to provide a forced mute signal that can be used to control the amplifier.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: August 14, 2018
    Assignees: STMicroelectronics (Shenzhen) R&D Co., Ltd., STMicroelectronics S.r.l.
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Publication number: 20180026598
    Abstract: A circuit can be used in a speaker system. The circuit includes an amplifier with an output configured to be coupled to a speaker. An offset comparator has an input coupled the output of the amplifier and is configured to provide an offset control signal. A digital circuit has a first input coupled to an output of the offset comparator, a second input configured to receive an amplifier control signal, a third input configured to receive a play control signal, and an output configured to provide a forced mute signal that can be used to control the amplifier.
    Type: Application
    Filed: October 3, 2017
    Publication date: January 25, 2018
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Patent number: 9800221
    Abstract: A circuit can be used in a speaker system. The circuit includes an amplifier with an output configured to be coupled to a speaker. An offset comparator has an input coupled the output of the amplifier and is configured to provide an offset control signal. A digital circuit has a first input coupled to an output of the offset comparator, a second input configured to receive an amplifier control signal, a third input configured to receive a play control signal, and an output configured to provide a forced mute signal that can be used to control the amplifier.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: October 24, 2017
    Assignees: STMicroelectronics (Shenzhen) R&D Co., Ltd., STMicroelectronics S.r.l.
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Publication number: 20170070201
    Abstract: A circuit can be used in a speaker system. The circuit includes an amplifier with an output configured to be coupled to a speaker. An offset comparator has an input coupled the output of the amplifier and is configured to provide an offset control signal. A digital circuit has a first input coupled to an output of the offset comparator, a second input configured to receive an amplifier control signal, a third input configured to receive a play control signal, and an output configured to provide a forced mute signal that can be used to control the amplifier.
    Type: Application
    Filed: November 18, 2016
    Publication date: March 9, 2017
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Patent number: 9532142
    Abstract: A digital circuit can be used in a speaker system. An intermediate node provides a speaker protection control signal. A first latch for receives an offset control signal. A first logic gate receives a play control signal, the offset control signal, and the speaker protection control signal. A second logic gate is coupled to the first latch for receiving the play control signal and the speaker protection control signal. A second latch is coupled to the first logic gate for providing a forced mute signal. A third latch is coupled to the second logic gate and to the intermediate node.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: December 27, 2016
    Assignees: STMicroelectronics (Shenzhen) R&D Co., Ltd., STMicroelectronics S.r.l.
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Patent number: 9461598
    Abstract: A power amplifier includes a clamping circuit configured to provide a clamped voltage from a power supply; an amplifier pair having first inputs coupled to the clamping circuit, second inputs and an output for providing an amplified signal; and a biasing circuit coupled between the clamping circuit and the second inputs. The biasing circuit is configured to adjust input bias voltages of the amplifier pair such that the output of the amplifier pair varies proportionally to a change of the power supply.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: October 4, 2016
    Assignees: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD, STMICROELECTRONICS S.R.L.
    Inventors: Kelvin Jian Wen, Mei Yang, Zheng Hua Song, Xian Xiong, Cristiano Meroni
  • Publication number: 20160269825
    Abstract: A digital circuit can be used in a speaker system. An intermediate node provides a speaker protection control signal. A first latch for receives an offset control signal. A first logic gate receives a play control signal, the offset control signal, and the speaker protection control signal. A second logic gate is coupled to the first latch for receiving the play control signal and the speaker protection control signal. A second latch is coupled to the first logic gate for providing a forced mute signal. A third latch is coupled to the second logic gate and to the intermediate node.
    Type: Application
    Filed: May 19, 2016
    Publication date: September 15, 2016
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Patent number: 9386372
    Abstract: A method of operating a speaker system including a speaker coupled to an amplifier, and a dedicated digital speaker protection circuit includes turning on the amplifier in a mute mode, after a first delay period, issuing a play command to the amplifier to place the amplifier in a play mode, but without an input signal during a second delay period, and performing a speaker offset detection during the second delay period, wherein, if there is an offset, then the amplifier is forced back into the mute mode, and if there is no offset, then the amplifier is allowed to continue to operate in the play mode. The method also includes issuing a speaker protection control signal or command if an offset is detected.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: July 5, 2016
    Assignees: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD., STMICROELECTRONICS S.R.L.
    Inventors: Xiangsheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Publication number: 20150381125
    Abstract: A power amplifier includes a clamping circuit configured to provide a clamped voltage from a power supply; an amplifier pair having first inputs coupled to the clamping circuit, second inputs and an output for providing an amplified signal; and a biasing circuit coupled between the clamping circuit and the second inputs. The biasing circuit is configured to adjust input bias voltages of the amplifier pair such that the bias voltage of the output of the amplifier pair varies proportionally to a change of the power supply.
    Type: Application
    Filed: February 4, 2015
    Publication date: December 31, 2015
    Applicants: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD, STMICROELECTRONICS S.R.L.
    Inventors: Kelvin Jian Wen, Mei Yang, Zheng Hua Song, Xian Xiong, Cristiano Meroni
  • Publication number: 20150304773
    Abstract: A method of operating a speaker system including a speaker coupled to an amplifier, and a dedicated digital speaker protection circuit includes turning on the amplifier in a mute mode, after a first delay period, issuing a play command to the amplifier to place the amplifier in a play mode, but without an input signal during a second delay period, and performing a speaker offset detection during the second delay period, wherein, if there is an offset, then the amplifier is forced back into the mute mode, and if there is no offset, then the amplifier is allowed to continue to operate in the play mode. The method also includes issuing a speaker protection control signal or command if an offset is detected.
    Type: Application
    Filed: June 30, 2015
    Publication date: October 22, 2015
    Inventors: XIANGSHENG LI, CRISTIANO MERONI, MEI YANG, XIAN FENG XIONG
  • Patent number: 9099978
    Abstract: A method of operating a speaker system including a speaker coupled to an amplifier, and a dedicated digital speaker protection circuit includes turning on the amplifier in a mute mode, after a first delay period, issuing a play command to the amplifier to place the amplifier in a play mode, but without an input signal during a second delay period, and performing a speaker offset detection during the second delay period, wherein, if there is an offset, then the amplifier is forced back into the mute mode, and if there is no offset, then the amplifier is allowed to continue to operate in the play mode. The method also includes issuing a speaker protection control signal or command if an offset is detected.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: August 4, 2015
    Assignee: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, XianFeng Xiong
  • Patent number: 7239258
    Abstract: A digital-to-analog converter (DAC) for an audio system may include at least first and second subsets of individually selectable elementary current sources for delivering analog output current contributions, a code conversion circuit for selecting elementary current sources of first and second subsets as a function of codes of a pulse code modulated (PCM) input signal. The DAC may multiply by a certain factor incoming codes of the PCM signal after their value has remained lower than a threshold for a certain period of time and for as long as their value equals or surpasses the threshold value, and may correspondingly scale and de-scale by the same factor the amplitude of the analog output current contributions produced by the elementary current sources of the two subsets.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: July 3, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventors: Antonio Grosso, Cristiano Meroni, Edoardo Botti
  • Publication number: 20060176203
    Abstract: A digital-to-analog converter (DAC) for an audio system may include at least first and second subsets of individually selectable elementary current sources for delivering analog output current contributions, a code conversion circuit for selecting elementary current sources of first and second subsets as a function of codes of a pulse code modulated (PCM) input signal. The DAC may multiply by a certain factor incoming codes of the PCM signal after their value has remained lower than a threshold for a certain period of time and for as long as their value equals or surpasses the threshold value, and may correspondingly scale and de-scale by the same factor the amplitude of the analog output current contributions produced by the elementary current sources of the two subsets.
    Type: Application
    Filed: February 10, 2006
    Publication date: August 10, 2006
    Applicant: STMicroelectronics S.r.I.
    Inventors: Antonio Grosso, Cristiano Meroni, Edoardo Botti
  • Patent number: 6445324
    Abstract: A method for digital-to-analog conversion of a digital input code into a first output analog signal and a second output analog signal to be supplied to a first terminal and a second terminal, respectively, of an audio load, the conversion being performed by means of a DAC with N-level balanced output, the conversion method includes using N/2 positive generator elements supplying respective positive elementary contributions which are nominally equal to one another, and N/2 negative generator elements supplying respective negative elementary contributions which are nominally equal to one another and, in absolute value, equal to the positive elementary contributions; attributing the same progressive addresses to the positive generator elements and to the negative generator elements; defining a first index for the positive input codes and a second index for the negative input codes; and, in the presence of an input code at the input of the DAC, selecting between the first index and the second index, the index cor
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: September 3, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Cristiano Meroni, Edoardo Botti, Andrea Baschirotto, Massimo Ghioni
  • Publication number: 20020063648
    Abstract: A method for digital-to-analog conversion of a digital input code into a first output analog signal and a second output analog signal to be supplied to a first terminal and a second terminal, respectively, of an audio load, the conversion being performed by means of a DAC with N-level balanced output, the conversion method includes using N/2 positive generator elements supplying respective positive elementary contributions which are nominally equal to one another, and N/2 negative generator elements supplying respective negative elementary contributions which are nominally equal to one another and, in absolute value, equal to the positive elementary contributions; attributing the same progressive addresses to the positive generator elements and to the negative generator elements; defining a first index for the positive input codes and a second index for the negative input codes; and, in the presence of an input code at the input of the DAC, selecting between the first index and the second index, the index cor
    Type: Application
    Filed: October 5, 2001
    Publication date: May 30, 2002
    Applicant: STMicroelectronics S.r.I.
    Inventors: Cristiano Meroni, Edoardo Botti, Andrea Baschirotto, Massimo Ghioni