Patents by Inventor Cristina Casellato

Cristina Casellato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11600665
    Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: March 7, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
  • Patent number: 11271042
    Abstract: One embodiment provides a method of making a memory device. The method includes forming a via in a bit line, an interlayer and a dielectric region. The bit line is formed on the interlayer. The interlayer is formed partially on the dielectric region and partially on a plurality of memory cells. The via has a first end included in, and in direct contact with, the bit line and a second end to couple to an electrical contact.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Anna Maria Conti, Cristina Casellato, Andrea Redaelli
  • Publication number: 20210091140
    Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.
    Type: Application
    Filed: October 13, 2020
    Publication date: March 25, 2021
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
  • Publication number: 20210066394
    Abstract: One embodiment provides a method of making a memory device. The method includes forming a via in a bit line, an interlayer and a dielectric region. The bit line is formed on the interlayer. The interlayer is formed partially on the dielectric region and partially on a plurality of memory cells. The via has a first end included in, and in direct contact with, the bit line and a second end to couple to an electrical contact.
    Type: Application
    Filed: March 16, 2018
    Publication date: March 4, 2021
    Inventors: ANNA MARIA CONTI, Cristina CASELLATO, ANDREA REDAELLI
  • Patent number: 10854674
    Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: December 1, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
  • Patent number: 10680037
    Abstract: A cross-point memory array includes a plurality of variable resistance memory cell pillars. Adjacent memory cell pillars are separated by a partially filled gap that includes a buried void. In addition, adjacent memory cell pillars include storage material elements that are at least partially interposed by the buried void.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: June 9, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Paolo Fantini, Cristina Casellato, Fabio Pellizzer
  • Patent number: 10396125
    Abstract: A cross-point memory array includes a plurality of variable resistance memory cell pillars. Adjacent memory cell pillars are separated by a partially filled gap that includes a buried void. In addition, adjacent memory cell pillars include storage material elements that are at least partially interposed by the buried void.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: August 27, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Paolo Fantini, Cristina Casellato, Fabio Pellizzer
  • Publication number: 20190006421
    Abstract: A method for fabricating a phase-change memory cell is described. The method includes forming a dielectric layer (228) on a metal layer (226) above a substrate. A phase-change material layer (230) is formed on the dielectric layer. A contact region (232) is formed, within the dielectric layer, between the phase-change material layer and the metal layer by breaking-down a portion of the dielectric layer.
    Type: Application
    Filed: August 27, 2018
    Publication date: January 3, 2019
    Inventors: Fabio Pellizzer, Michele Magistretti, Cristina Casellato, Monica Vigilante
  • Publication number: 20180358411
    Abstract: A cross-point memory array includes a plurality of variable resistance memory cell pillars. Adjacent memory cell pillars are separated by a partially filled gap that includes a buried void. In addition, adjacent memory cell pillars include storage material elements that are at least partially interposed by the buried void.
    Type: Application
    Filed: July 25, 2018
    Publication date: December 13, 2018
    Inventors: Paolo Fantini, Cristina Casellato, Fabio Pellizzer
  • Publication number: 20170365642
    Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.
    Type: Application
    Filed: August 31, 2017
    Publication date: December 21, 2017
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
  • Publication number: 20170358628
    Abstract: A cross-point memory array includes a plurality of variable resistance memory cell pillars. Adjacent memory cell pillars are separated by a partially filled gap that includes a buried void. In addition, adjacent memory cell pillars include storage material elements that are at least partially interposed by the buried void.
    Type: Application
    Filed: August 28, 2017
    Publication date: December 14, 2017
    Inventors: Paolo Fantini, Cristina Casellato, Fabio Pellizzer
  • Patent number: 9806129
    Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: October 31, 2017
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
  • Patent number: 9748311
    Abstract: A cross-point memory array includes a plurality of variable resistance memory cell pillars. Adjacent memory cell pillars are separated by a partially filled gap that includes a buried void. In addition, adjacent memory cell pillars include storage material elements that are at least partially interposed by the buried void.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: August 29, 2017
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Paolo Fantini, Cristina Casellato, Fabio Pellizzer
  • Patent number: 9570681
    Abstract: A resistive random access memory may include a memory array and a periphery around the memory array. Decoders in the periphery may be coupled to address lines in the array by forming a metallization in the periphery and the array at the same time using the same metal deposition. The metallization may form row lines in the array.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: February 14, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Cristina Casellato, Carmela Cupeta, Michele Magistretti, Fabio Pellizzer, Roberto Somaschini
  • Publication number: 20160133671
    Abstract: A cross-point memory array includes a plurality of variable resistance memory cell pillars. Adjacent memory cell pillars are separated by a partially filled gap that includes a buried void. In addition, adjacent memory cell pillars include storage material elements that are at least partially interposed by the buried void.
    Type: Application
    Filed: November 7, 2014
    Publication date: May 12, 2016
    Inventors: Paolo Fantini, Cristina Casellato, Fabio Pellizzer
  • Publication number: 20150357563
    Abstract: A method for fabricating a phase-change memory cell is described. The method includes forming a dielectric layer (228) on a metal layer (226) above a substrate. A phase-change material layer (230) is formed on the dielectric layer. A contact region (232) is formed, within the dielectric layer, between the phase-change material layer and the metal layer by breaking-down a portion of the dielectric layer.
    Type: Application
    Filed: August 17, 2015
    Publication date: December 10, 2015
    Inventors: Fabio Pellizzer, Michele Magistretti, Cristina Casellato, Monica Vigilante
  • Publication number: 20150243708
    Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.
    Type: Application
    Filed: February 25, 2014
    Publication date: August 27, 2015
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
  • Patent number: 9111856
    Abstract: A method for fabricating a phase-change memory cell is described. The method includes forming a dielectric layer (228) on a metal layer (226) above a substrate. A phase-change material layer (230) is formed on the dielectric layer. A contact region (232) is formed, within the dielectric layer, between the phase-change material layer and the metal layer by breaking-down a portion of the dielectric layer.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: August 18, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Fabio Pellizzer, Michele Magistretti, Cristina Casellato, Monica Vigilante
  • Publication number: 20150044832
    Abstract: A resistive random access memory may include a memory array and a periphery around the memory array. Decoders in the periphery may be coupled to address lines in the array by forming a metallization in the periphery and the array at the same time using the same metal deposition. The metallization may form row lines in the array.
    Type: Application
    Filed: September 19, 2014
    Publication date: February 12, 2015
    Inventors: Cristina Casellato, Carmela Cupeta, Michele Magistretti, Fabio Pellizzer, Roberto Somaschini
  • Patent number: 8860223
    Abstract: A resistive random access memory may include a memory array and a periphery around the memory array. Decoders in the periphery may be coupled to address lines in the array by forming a metallization in the periphery and the array at the same time using the same metal deposition. The metallization may form row lines in the array.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: October 14, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Cristina Casellato, Carmela Cupeta, Michele Magistretti, Fabio Pellizzer, Roberto Somaschini