Patents by Inventor Crosswell C. Collins

Crosswell C. Collins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7324546
    Abstract: A router is integrated onto a single silicon chip and includes an internal bus that couples multiple data receive and transmit channels to a central processing unit. The channels each have an external interface for connecting to different LAN or WAN networks. The serial channels are convertible into one or more time division multiplexed (TDM) channels. A time slot assigner (TSA) assembles and disassembles data packets transferred in TDM formats, such as ISDN. The serial channels are used for separately processing data packets in each TDM time slot. The TSA is programmable to operate with different TDM formats. A single direct memory access controller (DMAC) is coupled to each serial channel and an Ethernet channel and conducts data transfers on the internal router bus through a common port. The DMAC uses a novel bus protocol that provides selectable bandwidth allocation for each channel. The router architecture includes different interface circuitry which is also integrated onto the silicon chip.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: January 29, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Kevin J. Rowett, Crosswell C. Collins, Eric R. Buell
  • Patent number: 6366583
    Abstract: A router is integrated onto a single silicon chip and includes an internal bus that couples multiple data receive and transmit channels to a central processing unit. The channels each have an external interface for connecting to different LAN or WAN networks. The serial channels are convertible into one or more time division multiplexed (TDM) channels. A time slot assigner (TSA) assembles and disassembles data packets transferred in TDM formats, such as ISDN. The serial channels are used for separately processing data packets in each TDM time slot. The TSA is programmable to operate with different TDM formats. A single direct memory access controller (DMAC) is coupled to each serial channel and an Ethernet channel and conducts data transfers on the internal router bus through a common port. The DMAC uses a novel bus protocol that provides selectable bandwidth allocation for each channel. The router architecture includes different interface circuitry which is also integrated onto the silicon chip.
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: April 2, 2002
    Assignee: Cisco Technology, Inc.
    Inventors: Kevin J. Rowett, Crosswell C. Collins, Eric R. Buell
  • Patent number: 6148347
    Abstract: A memory controller and system for providing access to PCMCIA standard memory cards and non-standard memory cards. Non-standard memory cards are memory cards that are compliant with PCMCIA standards for sockets and are non-compliant in other respects. The memory controller has a register for storing a code that indicates whether a memory card is a PCMCIA card or a non-standard memory card. An access control circuit in the memory controller activates and deactivates memory card control signals at times required by the memory card and as indicated by the memory card type. An acknowledge control circuit generates an acknowledge signal to a requesting processor at a time prescribed by the type of memory card.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: November 14, 2000
    Assignee: Cisco Technology, Inc.
    Inventors: Kenneth B. Finch, Eric Youngman, Crosswell C. Collins, Kevin J. Rowett
  • Patent number: 5991817
    Abstract: A router is integrated onto a single silicon chip and includes an internal bus that couples multiple data receive and transmit channels to a central processing unit. The channels each have an external interface for connecting to different LAN or WAN networks. The serial channels are convertible into one or more time division multiplexed (TDM) channels. A time slot assigner (TSA) assembles and disassembles data packets transferred in TDM formats, such as ISDN. The serial channels are used for separately processing data packets in each TDM time slot. The TSA is programmable to operate with different TDM formats. A single direct memory access controller (DMAC) is coupled to each serial channel and an Ethernet channel and conducts data transfers on the internal router bus through a common port. The DMAC uses a novel bus protocol that provides selectable bandwidth allocation for each channel. The router architecture includes different interface circuitry which is also integrated onto the silicon chip.
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: November 23, 1999
    Assignee: Cisco Systems, Inc.
    Inventors: Kevin J. Rowett, Crosswell C. Collins, Eric R. Buell