Patents by Inventor Cuicui Zhou

Cuicui Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170393
    Abstract: A 3D memory device includes a conductor/insulator stack, a channel hole structure extending through the conductor/insulator stack, and a staircase contact (SCT). The conductor/insulator stack includes a first conductive layer and a first dielectric layer alternatingly stacked. The SCT includes a conductive structure, extends through the first dielectric layer, contacts a second dielectric layer, and is electrically connected to the first conductive layer. The second dielectric layer is parallel to the first conductive layer.
    Type: Application
    Filed: November 18, 2022
    Publication date: May 23, 2024
    Inventors: Linchun WU, Wenxi ZHOU, Cuicui KONG, Zhiliang XIA, Zongliang HUO
  • Patent number: 11958186
    Abstract: Structural members and methods for manufacturing a plastic-based, bulk, antimicrobial structural member of a robot. Such bulk antimicrobial plastic solution can meet the hygienic requirement and the mechanical performance requirement of a structural member of a robot simultaneously. Meanwhile, it may reduce the overall weight of the robot.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: April 16, 2024
    Assignee: ABB SCHWEIZ AG
    Inventors: Zhiqiang Tao, Hao Gu, Shanghua Li, Cuicui Su, Weidong Zhou, Jiansheng Chen, Shaobo Xie
  • Publication number: 20240074181
    Abstract: A memory device includes a stack structure, channel structures, and a slit structure. The stack structure includes interleaved conductive layers and dielectric layers, and the conductive layers include a plurality of word lines. Each of the channel structures extends vertically through the stack structure. The slit structure extends vertically through the stack structure. An outer region of the stack structure includes a staircase structure, and the interleaved conductive layers and dielectric layers in a bottom portion of the stack structure are wider than the interleaved conductive layers and dielectric layers in a top portion of the stack structure. A first outer width of the slit structure in the bottom portion of the stack structure is greater than a second outer width of the slit structure in the top portion of the stack structure.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Linchun Wu, Kun Zhang, Wenxi Zhou, Cuicui Kong, Shuangshuang Wu, Zhiliang Xia, Zongliang Huo
  • Patent number: D868139
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: November 26, 2019
    Inventor: Cuicui Zhou