Patents by Inventor Cuihua Fu

Cuihua Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8737388
    Abstract: A system for processing packets in a distributed architecture system includes a main control board, at least one service board, and at least one interface board. The system determines a specified CPU corresponding to a received packet; and, by the service board corresponding to the CPU, processes the received packet. The received packets are processed in the service board corresponding to the specified CPU. Therefore, the packets are evenly distributed to all service boards for being processed, the workload of the main control board is relieved, the service throughput is increased significantly, and the packet processing efficiency of the whole architecture is improved.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: May 27, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Zhiqiang Zhu, Rihua Zhang, Guibin Hou, Yong Xu, Wenhui Xie, Bo Ma, Guolu Gao, Xiaoping Lu, Cuihua Fu
  • Publication number: 20130297671
    Abstract: A system for processing packets in a distributed architecture system includes a main control board, at least one service board, and at least one interface board. The system determines a specified CPU corresponding to a received packet; and, by the service board corresponding to the CPU, processes the received packet. The received packets are processed in the service board corresponding to the specified CPU. Therefore, the packets are evenly distributed to all service boards for being processed, the workload of the main control board is relieved, the service throughput is increased significantly, and the packet processing efficiency of the whole architecture is improved.
    Type: Application
    Filed: July 5, 2013
    Publication date: November 7, 2013
    Inventors: Zhiqiang Zhu, Rihua Zhang, Guibin Hou, Yong Xu, Wenhui Xie, Bo Ma, Guolu Gao, Xiaoping Lu, Cuihua Fu
  • Patent number: 8509239
    Abstract: A method, an apparatus, and a system for processing packets are disclosed. The method is applied to a distributed architecture of multiple service boards; the distributed architecture includes a main control board, at least one service board, and at least one interface board. The method includes: determining a specified CPU corresponding to a received packet; and, by the service board corresponding to the CPU, processing the received packet. Through the embodiments of the present invention, the received packets are processed in the service board corresponding to the specified CPU. Therefore, the packets are evenly distributed to all service boards for being processed, the workload of the main control board is relieved, the service throughput is increased significantly, and the packet processing efficiency of the whole architecture is improved.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: August 13, 2013
    Assignee: Chengdu Huawei Symantec Technologies Co., Ltd.
    Inventors: Zhiqiang Zhu, Rihua Zhang, Guibin Hou, Yong Xu, Wenhui Xie, Bo Ma, Guolu Gao, Xiaoping Lu, Cuihua Fu
  • Publication number: 20110149971
    Abstract: A method, an apparatus, and a system for processing packets are disclosed. The method is applied to a distributed architecture of multiple service boards; the distributed architecture includes a main control board, at least one service board, and at least one interface board. The method includes: determining a specified CPU corresponding to a received packet; and, by the service board corresponding to the CPU, processing the received packet. Through the embodiments of the present invention, the received packets are processed in the service board corresponding to the specified CPU. Therefore, the packets are evenly distributed to all service boards for being processed, the workload of the main control board is relieved, the service throughput is increased significantly, and the packet processing efficiency of the whole architecture is improved.
    Type: Application
    Filed: February 18, 2011
    Publication date: June 23, 2011
    Inventors: Zhiqiang Zhu, Rihua Zhang, Guibin Hou, Yong Xu, Wenhui Xie, Bo Ma, Guolu Gao, Xiaoping Lu, Cuihua Fu