Abstract: A pH sensor is provided. The pH sensor comprises a substrate and an ion sensitive field effect transistor (ISFET) die comprising an ion sensing part that responds to pH, wherein the ISFET die is located over the substrate. The pH sensor also comprises a protective layer formed over at least a portion of an outer surface of the ISFET die and at least a portion of the substrate. Further, the pH sensor comprises a cover member mechanically coupled to the protective layer, wherein the cover member houses the ISFET die and the substrate, and wherein the cover member defines an opening proximate to the ion sensing part.

Abstract: A pH sensor is provided. The pH sensor comprises a substrate and an ion sensitive field effect transistor (ISFET) die comprising an ion sensing part that responds to pH, wherein the ISFET die is located over the substrate. The pH sensor also comprises a protective layer formed over at least a portion of an outer surface of the ISFET die and at least a portion of the substrate. Further, the pH sensor comprises a cover member mechanically coupled to the protective layer, wherein the cover member houses the ISFET die and the substrate, and wherein the cover member defines an opening proximate to the ion sensing part.

Abstract: A diaphragm for a pressure sensor includes a central portion having a primary thickness and a surrounding secondary portion having a secondary thickness greater than the primary thickness. The pressure sensor includes the diaphragm, a fluid conduit capped by the diaphragm, and a piezoelectric bridge for each of the primary and secondary portions to generate a signal indicative of the displacement of the portions; and a method of producing the sensor.

Abstract: A method of electrically isolating a MEMS device is provided. In one example, a piezo-resistive pressure sensor having an exposed silicon region undergoes a Local Oxidation of Silicon (LOCOS) process. An electrically insulating structure is created in the LOCOS process. The insulating structure has a rounded, or curved, interface with the piezo-resistive pressure sensor. The curved interface mitigates stresses associated with exposure to high temperatures and pressures. Additionally, the electrically insulating line may be patterned so that it has curved angles, further mitigating stress.

Abstract: A method of forming a piezo-resistive sensor, comprising a piezo-resistor, a leadout resistor, and an insulator structure is provided. A Silicon-On-Insulator (SOI) substrate is provided having an epitaxial layer, a dielectric layer, and a bulk substrate layer. A mask layer is formed on top of the epitaxial layer. The mask layer defines where the piezo-resistor and leadout resistors are to be located by creating first exposed portions of the epitaxial layer. A silicon dioxide layer (SiO2) is grown in a Local Oxidation of Silicon (LOCOS) process for a predetermined time on the first exposed portions based on the desired thickness of the piezo-resistor, where the-piezo resistor is located below the SiO2 layer. The thickness of the leadout resistor, and therefore the parasitic leadout resistance, is determined by the original thickness of the epitaxial layer and can be maintained independent of the piezo-resistor thickness.

Abstract: A microelectromechanical device and method of fabricating the same, including a layer of patterned and deposited metal or mechanical-quality, doped polysilicon inserted between the appropriate device element layers, which provides a conductive layer to prevent the microelectromechanical device's output from drifting. The conductive layer may encapsulate of the device's sensing or active elements, or may selectively cover only certain of the device's elements. Further, coupling the metal or mechanical-quality, doped polysilicon to the same voltage source as the device's substrate contact may place the conductive layer at the voltage of the substrate, which may function as a Faraday shield, attracting undesired, migrating ions from interfering with the output of the device.

Abstract: A microelectromechanical device and method of fabricating the same, including a layer of patterned and deposited metal or mechanical-quality, doped polysilicon inserted between the appropriate device element layers, which provides a conductive layer to prevent the microelectromechanical device's output from drifting. The conductive layer may encapsulate of the device's sensing or active elements, or may selectively cover only certain of the device's elements. Further, coupling the metal or mechanical-quality, doped polysilicon to the same voltage source as the device's substrate contact may place the conductive layer at the voltage of the substrate, which may function as a Faraday shield, attracting undesired, migrating ions from interfering with the output of the device.

Abstract: A process for oxidizing the silicon layer into a device-isolating field oxide having a radiation-hardened reduced bird's beak. An angled and rotated field implant prior to oxidation is used to increase the doping concentration in the edge region of the MOS transistors to compensate for boron leaching during oxidation. The field oxide is grown at a low temperature by high pressure oxidation which increases total dose hardness by making a silicon-rich oxide film.

Abstract: An isolation structure as well as a method for using and fabricating an isolation structure in an active layer deposited on a substrate the method of fabrication including the steps of forming a buried oxide layer in the active layer adjacent the substrate, forming an isolation trench in the active layer by etching at least up to and optionally into the substrate, forming a dielectric isolation layer on the exposed surfaces of the trench, removing the dielectric isolation layer from the bottom of the trench, and forming an isolation structure by epitaxially growing monocrystalline silicon in the trench.

Abstract: An isolation structure as well as a method for using and fabricating an isolation structure in an active layer deposited on a substrate the method of fabrication including the steps of forming a buried oxide layer in the active layer adjacent the substrate, forming an isolation trench in the active layer by etching at least up to and optionally into the substrate, forming a dielectric isolation layer on the exposed surfaces of the trench, removing the dielectric isolation layer from the bottom of the trench, and forming an isolation structure by epitaxially growing monocrystalline silicon in the trench.