Patents by Inventor Curtis Hart

Curtis Hart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7485951
    Abstract: An IC die and a flexible circuit structure are integrated into a lower stack element that can be stacked with either further integrated lower stack element iterations or with pre-packaged ICs in any of a variety of package types. The present invention may be employed to stack similar or dissimilar integrated circuits and may be used to create modularized systems. In a preferred embodiment, a die is positioned above the surface of portions of a pair of flex circuits. Connection is made between the die and the flex circuitry. A protective layer such as a molded plastic, for example, is formed to protect the flex-connected die and its connection to the flex. Connective elements are placed along the flex circuitry to create an array of module contacts along the second side of the flex circuitry. The flex circuitry is positioned above the body-protected die to create an integrated lower stack element.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: February 3, 2009
    Assignee: Entorian Technologies, LP
    Inventors: David L. Roper, Curtis Hart, James Wilder, Phill Bradley, James G. Cady, Jeff Buchle, James Douglas Wehrly, Jr.
  • Publication number: 20080067662
    Abstract: An IC die and a flexible circuit structure are integrated into a lower stack element that can be stacked with either further integrated lower stack element iterations or with pre-packaged ICs in any of a variety of package types. A die is positioned above the surface of portions of a pair of flex circuits. Connection is made between the die and the flex circuitry. A protective layer is formed to protect the flex-connected die and its connection to the flex. Connective elements are placed along the flex circuitry to create an array of module contacts along the second side of the flex circuitry. The flex circuitry is positioned above the body-protected die to create an integrated lower stack element. The integrated lower stack element may be stacked either with iterations of the integrated lower stack element or with a pre-packaged IC to create a multi-element stacked circuit module.
    Type: Application
    Filed: November 16, 2007
    Publication date: March 20, 2008
    Inventors: David Roper, Curtis Hart, James Wilder, Phill Bradley, James Cady, Jeff Buchle, James Wehrly
  • Publication number: 20040000707
    Abstract: An IC die and a flexible circuit structure are integrated into a lower stack element that can be stacked with either further integrated lower stack element iterations or with pre-packaged ICs in any of a variety of package types. The present invention may be employed to stack similar or dissimilar integrated circuits and may be used to create modularized systems. In a preferred embodiment, a die is positioned above the surface of portions of a pair of flex circuits. Connection is made between the die and the flex circuitry. A protective layer such as a molded plastic, for example, is formed to protect the flex-connected die and its connection to the flex. Connective elements are placed along the flex circuitry to create an array of module contacts along the second side of the flex circuitry. The flex circuitry is positioned above the body-protected die to create an integrated lower stack element.
    Type: Application
    Filed: May 9, 2003
    Publication date: January 1, 2004
    Applicant: Staktek Group, L.P.
    Inventors: David L. Roper, Curtis Hart, James Wilder, Phill Bradley, James G. Cady, Jeff Buchle, James Douglas Wehrly
  • Patent number: 6272741
    Abstract: A circuit board interconnect system includes a carrier board with a hybrid solder ball and pin grid array. A plurality of electrically conductive pins extend through the carrier board and are arranged in rows and columns to form a grid array. A first circuit board such as a multi-chip module (MCM) board has a plurality of conductive pads or traces formed on a lower surface thereof that are arranged to form a complementary grid array, i.e. the spacing and location of the conductive pads or traces corresponds to the spacing and location of the pins. A plurality of solder balls are provided with each ball being positioned on top of a corresponding pin so that each solder ball forms a solder connection between a pin and a corresponding conductive pad or trace. A second circuit board such as a computer mother board has a pin connector mounted on an upper surface thereof for individually receiving and providing electrical connection with each of the pins.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: August 14, 2001
    Assignees: Autosplice, Inc., Xetel Corp.
    Inventors: Craig M. Kennedy, Julian Curtis Hart, Fernando J. Ramirez