Patents by Inventor Curtis Hayes
Curtis Hayes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170176599Abstract: Methods and systems are provided for locating a vehicle. A locating device receives position data and determines an approximate position of the vehicle. A remote server reports a correction factor for each of a plurality of locations and a broadcast server broadcasts the correction factors over a wireless data stream. A receiver device receives the correction factors from the broadcast device and a correction device extracts a selected correction factor from the wireless data stream based on the location and the approximate position to determine a refined position of the vehicle.Type: ApplicationFiled: December 22, 2015Publication date: June 22, 2017Applicant: GENERAL MOTORS LLCInventors: Curtis HAY, Paul K. WAGNER
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Patent number: 9245854Abstract: Apparatus and methods for an electronic package incorporating shielding against emissions of electromagnetic interference (EMI). According to an integrated circuit structure, a substrate is on a printed circuit board. An integrated circuit chip is on the substrate. The integrated circuit chip is electrically connected to the substrate. An EMI shielding unit is on the integrated circuit chip and the substrate. The EMI shielding unit comprises a lid covering the integrated circuit chip and portions of the substrate outside the integrated circuit chip. A fill material can be deposited within a cavity formed between the lid and the substrate. The fill material comprises an EMI absorbing material. A periphery of the lid comprises a side skirt, the side skirt circumscribing the integrated circuit chip and the substrate. EMI absorbing material is on the printed circuit board, and a portion of the side skirt is embedded in the EMI absorbing material.Type: GrantFiled: October 16, 2014Date of Patent: January 26, 2016Assignee: GLOBALFOUNDRIES Inc.Inventors: William L. Brodsky, Timothy W. Budell, Samuel R. Connor, Mark Curtis Hayes Lamorey, Janak G. Patel, Peter Slota, Jr., David B. Stone
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Patent number: 8952503Abstract: Apparatus and methods for an electronic package incorporating shielding against emissions of electromagnetic interference (EMI). According to an integrated circuit structure, a substrate is on a printed circuit board. An integrated circuit chip is on the substrate. The integrated circuit chip is electrically connected to the substrate. An electromagnetic interference (EMI) shielding unit is on the integrated circuit chip and the substrate. The EMI shielding unit comprises a lid covering the integrated circuit chip and portions of the substrate outside the integrated circuit chip. A fill material can be deposited within a cavity formed between the lid and the substrate. The fill material comprises an EMI absorbing material. A periphery of the lid comprises a side skirt, the side skirt circumscribing the integrated circuit chip and the substrate. EMI absorbing material is on the printed circuit board, and a portion of the side skirt is embedded in the EMI absorbing material.Type: GrantFiled: January 29, 2013Date of Patent: February 10, 2015Assignee: International Business Machines CorporationInventors: William L. Brodsky, Timothy W. Budell, Samuel R. Connor, Mark Curtis Hayes Lamorey, Janak G. Patel, Peter Slota, Jr., David B. Stone
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Publication number: 20150033554Abstract: Apparatus and methods for an electronic package incorporating shielding against emissions of electromagnetic interference (EMI). According to an integrated circuit structure, a substrate is on a printed circuit board. An integrated circuit chip is on the substrate. The integrated circuit chip is electrically connected to the substrate. An EMI shielding unit is on the integrated circuit chip and the substrate. The EMI shielding unit comprises a lid covering the integrated circuit chip and portions of the substrate outside the integrated circuit chip. A fill material can be deposited within a cavity formed between the lid and the substrate. The fill material comprises an EMI absorbing material. A periphery of the lid comprises a side skirt, the side skirt circumscribing the integrated circuit chip and the substrate. EMI absorbing material is on the printed circuit board, and a portion of the side skirt is embedded in the EMI absorbing material.Type: ApplicationFiled: October 16, 2014Publication date: February 5, 2015Inventors: William L. Brodsky, Timothy W. Budell, Samuel R. Connor, Mark Curtis Hayes Lamorey, Janak G. Patel, Peter Slota, JR., David B. Stone
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Patent number: 8126249Abstract: A method and system for detection and tracking of osteoporosis is disclosed. A method of characterizing an image of a target vertebra includes building a computer model from a set of sample images of pathological and non-pathological variations of vertebrae representing variations in shape of the vertebrae. The method also includes receiving an image of a target vertebra of a subject and automatically estimating contours of lateral outlines of the superior and the inferior cortical endplates of the image. The parameters of the model are varied to determine a set that represents a model shape that approximates the estimated contours of the outlines of the cortical endplates. The method includes automatically characterizing the target vertebra based on the set of model parameters that are determined and outputting on a display device the characterization of the target vertebra.Type: GrantFiled: February 11, 2009Date of Patent: February 28, 2012Assignee: Optasia Medical LimitedInventors: Alan Brett, Jane Haslam, Curtis Hayes, Joel Krasnow, Cornelis Van Kuijk, Colin Miller
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Publication number: 20090297012Abstract: A method and system for detection and tracking of osteoporosis is disclosed. A method of characterizing an image of a target vertebra includes building a computer model from a set of sample images of pathological and non-pathological variations of vertebrae representing variations in shape of the vertebrae. The method also includes receiving an image of a target vertebra of a subject and automatically estimating contours of lateral outlines of the superior and the inferior cortical endplates of the image. The parameters of the model are varied to determine a set that represents a model shape that approximates the estimated contours of the outlines of the cortical endplates. The method includes automatically characterizing the target vertebra based on the set of model parameters that are determined and outputting on a display device the characterization of the target vertebra.Type: ApplicationFiled: February 11, 2009Publication date: December 3, 2009Inventors: Alan Brett, Jane Haslam, Curtis Hayes, Joel Krasnow, Cornelis Van Kuijk, Colin Miller
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Patent number: 7505337Abstract: A method for repairing a shorted tunnel device includes the step of applying a stressing signal to the tunnel device. The stressing signal has an amplitude that is greater than an amplitude of a bias signal applied to the device during normal operation. One or more characteristics of the stressing signal are selected so as to substantially optimize a repair of the device. The amplitude and/or the duration of the stressing signal are preferably selected so as to remove a conductive filament shorting the device via a thermal mechanism (e.g., heating).Type: GrantFiled: January 12, 2006Date of Patent: March 17, 2009Assignee: International Business Machines CorporationInventors: Janusz Jozef Nowak, Mark Curtis Hayes Lamorey, Yu Lu
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Patent number: 7352639Abstract: Apparatus for repairing one or more shorted memory cells in a memory circuit includes control circuitry. The control circuitry is operative in one of at least a first mode and a second mode. In the first mode, the control circuitry is operative to apply a first signal to a selected memory cell in the memory circuit for reading a logic state of the selected memory cell and to determine whether or not the selected memory cell is shorted. In the second mode, the control circuitry is operative to apply a second signal to a selected memory cell which has been determined to be shorted for initiating a repair of the selected memory cell, the second signal being greater in magnitude than the first signal.Type: GrantFiled: April 27, 2007Date of Patent: April 1, 2008Assignee: International Business Machines CorporationInventors: Mark Curtis Hayes Lamorey, Yu Lu, Janusz Jozef Nowak
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Patent number: 7260004Abstract: Apparatus for repairing one or more shorted memory cells in a memory circuit includes control circuitry. The control circuitry is operative in one of at least a first mode and a second mode. In the first mode, the control circuitry is operative to apply a first signal to a selected memory cell in the memory circuit for reading a logic state of the selected memory cell and to determine whether or not the selected memory cell is shorted. In the second mode, the control circuitry is operative to apply a second signal to a selected memory cell which has been determined to be shorted for initiating a repair of the selected memory cell, the second signal being greater in magnitude than the first signal.Type: GrantFiled: January 12, 2006Date of Patent: August 21, 2007Assignee: International Busniess Machines CorporationInventors: Mark Curtis Hayes Lamorey, Yu Lu, Janusz Jozef Nowak