Patents by Inventor Curtis Johnson

Curtis Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210184603
    Abstract: A system for the resilience of an electric submersible pumping system to a transient power interruption includes a power backup connected to the variable speed drive of the pumping system. A method for controlling the electric submersible pump during the transient power interruption includes connecting a variable speed drive to a power source, charging one or more rechargeable batteries within the power backup, and connecting the power backup to the variable speed drive. The method continues with the steps of operating the motor with the variable speed drive, detecting a disruption in AC power from the power source to the variable speed drive, and applying power from the power backup to the variable speed drive to operate the motor during the transient interruption in electrical power.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 17, 2021
    Applicant: Baker Hughes Oilfield Operations LLC
    Inventors: Gary Williams, Alexey Tyshko, Brian Reeves, Curtis Johnson, Nathan Etter, Mohamed Ouf, Mahendra Joshi
  • Patent number: 10997102
    Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A direct memory access (DMA) engine, coupled to the one or more processor clusters, is configured, wherein the DMA engine employs address generation across a plurality of tensor dimensions. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. DMA addresses are generated based on the unique address space descriptors and the common address space descriptor. Memory using two or more of the DMA addresses that were generated is accessed, where the two or more DMA addresses enable processing within the one or more processor clusters.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: May 4, 2021
    Assignee: Wave Computing, Inc.
    Inventors: David John Simpson, Richard Douglas Trauben, Stephen Curtis Johnson
  • Patent number: 10949328
    Abstract: Techniques are disclosed for data manipulation within a reconfigurable computing environment for data flow graph computation using exceptions. Processing elements are configured within a reconfigurable fabric to implement a data flow graph. The processing elements are loaded with process agents. Valid data is executed by a first process agent on a first processing element, where the first process agent corresponds to a starting node of the data flow graph. A second processing element detects that an error exception has occurred, where a second process agent is running on the second processing element. A done signal to a third process agent is withheld by the second process agent, where the third process agent is running on a third processing element. The second process agent raises an interrupt request, where the interrupt request is based on the detecting that an error exception has occurred.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: March 16, 2021
    Assignee: Wave Computing, Inc.
    Inventors: Keith Mark Evans, Stephen Curtis Johnson
  • Publication number: 20210011849
    Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A plurality of dimensions from a tensor is flattened into a single dimension. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. A direct memory access (DMA) engine coupled to the one or more processor clusters is configured. Addresses are generated based on the unique address space descriptors and the common address space descriptor. The plurality of dimensions can be summed to generate a single address. Memory is accessed using two or more of the addresses that were generated. The addresses are used to enable DMA access.
    Type: Application
    Filed: September 29, 2020
    Publication date: January 14, 2021
    Inventors: David John Simpson, Stephen Curtis Johnson, Richard Douglas Trauben
  • Publication number: 20200371978
    Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A direct memory access (DMA) engine, coupled to the one or more processor clusters, is configured, wherein the DMA engine employs address generation across a plurality of tensor dimensions. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. DMA addresses are generated based on the unique address space descriptors and the common address space descriptor. Memory using two or more of the DMA addresses that were generated is accessed, where the two or more DMA addresses enable processing within the one or more processor clusters.
    Type: Application
    Filed: August 12, 2020
    Publication date: November 26, 2020
    Inventors: David John Simpson, Richard Douglas Trauben, Stephen Curtis Johnson
  • Publication number: 20200224512
    Abstract: An inner lube plug for plugging a diamond drill hole, the plug assembly comprising a body component having proximal and distal ends; a compressible plunger component attached to the distal end of the body component by attachment means; a plurality of plug feet disposed radially around the body component; and a torsion spring disposed between each pair of adjacent plug feet, as well as methods for using the inner tube plug to perform down-hole orientation correction of a drill hole, bypassing (if an impassable zone, and completion of a drill hole.
    Type: Application
    Filed: May 22, 2018
    Publication date: July 16, 2020
    Inventors: Curtis JOHNSON, Mark SEILSTAD, Alex CHRISTIE
  • Publication number: 20200174707
    Abstract: Techniques for data manipulation using filling logic for tensor calculation are disclosed. A processor and a memory subsystem for data manipulation are obtained. A FIFO is configured between the processor and the memory subsystem, where the FIFO is coupled with the processor. FIFO filling logic is configured between the FIFO and the memory subsystem, wherein the FIFO filling logic is connected to the FIFO and the memory subsystem. The processor consumes an element stream from the FIFO, wherein the element stream flows to the FIFO from the memory subsystem through the FIFO filling logic. The element stream from the FIFO comprises elements of a tensor, and the consuming comprises performing tensor calculations. An address is provided to the FIFO filling logic for accessing data from the memory subsystem using an address generator.
    Type: Application
    Filed: February 7, 2020
    Publication date: June 4, 2020
    Inventor: Stephen Curtis Johnson
  • Publication number: 20190324888
    Abstract: Techniques are disclosed for data manipulation within a reconfigurable computing environment for data flow graph computation using exceptions. Processing elements are configured within a reconfigurable fabric to implement a data flow graph. The processing elements are loaded with process agents. Valid data is executed by a first process agent on a first processing element, where the first process agent corresponds to a starting node of the data flow graph. A second processing element detects that an error exception has occurred, where a second process agent is running on the second processing element. A done signal to a third process agent is withheld by the second process agent, where the third process agent is running on a third processing element. The second process agent raises an interrupt request, where the interrupt request is based on the detecting that an error exception has occurred.
    Type: Application
    Filed: July 3, 2019
    Publication date: October 24, 2019
    Inventors: Keith Mark Evans, Stephen Curtis Johnson
  • Publication number: 20190130276
    Abstract: Techniques are disclosed for tensor manipulation within a neural network and include training the neural network. An input tensor is obtained for manipulation within a deep neural network. The input tensor includes fixed-point numerical representations and tensor metadata and is applied to a layer within the deep neural network. The input tensor has variable radix points associated with the fixed-point values of the input tensor. A weighting tensor including metadata is determined for the input tensor applied to the layer. An output tensor is calculated from the layer within the deep neural network based on the input tensor and the weighting tensor. The output tensor has fixed-point values with a second set of variable radix points associated with the fixed-point values of the output tensor. The output tensor includes tensor metadata. The output tensor is propagated within the deep neural network.
    Type: Application
    Filed: October 25, 2018
    Publication date: May 2, 2019
    Inventors: Kenneth Shiring, Stephen Curtis Johnson
  • Publication number: 20190130268
    Abstract: Techniques are disclosed for tensor radix point calculation in a neural network. A first tensor is obtained. A first set of weights is generated for the first tensor. An operation is evaluated to be performed by a layer within a deep neural network on the first tensor using the first set of weights. A set of output radix points is determined for the layer within the deep neural network based on the first tensor and the operation. An output tensor is calculated for the layer within the deep neural network using the set of output radix points, the first tensor, and the first set of weights. The operation is restarted, when the layer reports a hardware overflow, using an updated set of output radix points. The determining is further based on a radix point for the first tensor. The determining is further based on metadata for the first tensor.
    Type: Application
    Filed: October 30, 2018
    Publication date: May 2, 2019
    Inventors: Kenneth Shiring, Stephen Curtis Johnson
  • Patent number: 10261157
    Abstract: Aspects of the subject disclosure include a system that applies magnetic resonance elastography to a sample to obtain uncorrected k-space data where the magnetic resonance elastography utilizes a multi-shot spin-echo sequence with variable density spiral readout gradients, and adjusts the uncorrected k-space data to corrected k-space data by adjusting a k-space trajectory by shifting a center point for each shot to a new center point according to signal intensity and by adjusting a phase for each shot based on a phase offset that is determined according to the signal intensity.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: April 16, 2019
    Assignee: THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS
    Inventors: Bradley Sutton, John G. Georgiadis, Curtis Johnson
  • Patent number: 10255237
    Abstract: A system includes transmission of a first transaction identifier and a first commit identifier to a first data storage system, the first commit identifier identifying a first data snapshot of the first data storage system, transmission of a first query to the first data storage system, transmission of a first prepare instruction and the first transaction identifier to the first data storage system, determination that a first ready response has been received from the first data storage system in response to the first prepare instruction, transmission, in response to the determination, of a first commit instruction and the first transaction identifier to the first data storage system, and reception of a second commit identifier from the first data storage system, the second commit identifier identifying a second data snapshot of the first data storage system.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: April 9, 2019
    Assignee: SAP SE
    Inventors: Curtis Johnson, Kyu Hwan Kim, Karim Khamis, Kurt Deschler
  • Patent number: 9980063
    Abstract: Disclosed herein, among other things, are systems and methods for integrating a living-hinge in a hearing instrument. A system may include a living-hinge cover for a momentary, multi-function switch. The living-hinge switch may be used for volume adjustment. The system may be used to prevent debris ingress or rattling sounds.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: May 22, 2018
    Assignee: Starkey Laboratories, Inc.
    Inventor: Nathan Curtis Johnson
  • Publication number: 20180027343
    Abstract: A hearing aid design is described that compartmentalizes hearing aid components for easier use and better operation. In one embodiment, the processing circuitry and transducers are disposed in housing designed to placed in the ear canal so as to be isolated from antennas and sources of noise. In one embodiment, the battery is moved out of the canal in a behind-the-ear housing so that the remaining components in the ear canal are smaller so as to improve fit rate.
    Type: Application
    Filed: July 19, 2017
    Publication date: January 25, 2018
    Inventors: Brian Dobson, Daniel A. Hanson, Gregory John Haubrich, Christopher Young, Jeffrey Paul Solum, Yoshi Kasahara, Preetham Varghese, Nathan Curtis Johnson
  • Publication number: 20180011895
    Abstract: A system includes transmission of a first transaction identifier and a first commit identifier to a first data storage system, the first commit identifier identifying a first data snapshot of the first data storage system, transmission of a first query to the first data storage system, transmission of a first prepare instruction and the first transaction identifier to the first data storage system, determination that a first ready response has been received from the first data storage system in response to the first prepare instruction, transmission, in response to the determination, of a first commit instruction and the first transaction identifier to the first data storage system, and reception of a second commit identifier from the first data storage system, the second commit identifier identifying a second data snapshot of the first data storage system.
    Type: Application
    Filed: July 6, 2016
    Publication date: January 11, 2018
    Inventors: Curtis Johnson, Kyu Hwan Kim, Karim Khamis, Kurt Deschler
  • Patent number: 9692419
    Abstract: Compact logic evaluation gates are built using null convention logic (NCL) circuits. The inputs to a null convention circuit include a NCL true input and a NCL complement input. The NCL circuit includes a gate coupled to the pair of inputs, where the gate comprises a plurality of transistors. The transistors allow for logical signal capture, provide a pair of cross-coupled inverters for data storage, and include a first and second pull-down device. The first pull-down device causes a first side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL true input, and the second pull-down device causes a second side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL complement input.
    Type: Grant
    Filed: November 14, 2015
    Date of Patent: June 27, 2017
    Assignee: Wave Computing, Inc.
    Inventors: Benjamin Wiley Melton, Stephen Curtis Johnson
  • Publication number: 20170116641
    Abstract: A computing system with a data structure for mapping answers to keywords, the computing system including a computer based quiz program executed on a processor of a client computing device, configured to cause the processor to: retrieve quiz data for a computer based quiz including one or more questions, display the computer based quiz via a display associated with the client computing device, receive a user input of an answer for each question of the computer based quiz, retrieve at least one keyword associated with one or more answers from a data structure that maps answers of the one or more questions of the computer based quiz to one or more associated keywords.
    Type: Application
    Filed: October 26, 2015
    Publication date: April 27, 2017
    Inventors: Nathan Harry Bernstein, Thomas Harold Emmons, Shane Curtis Johnson
  • Patent number: 9611695
    Abstract: A downhole tool assembly for use in directional drilling operations. The assembly has a housing, a chuck, a cutting tool, a hub, and an elongate drive member. The housing has a spindle for supporting the hub and chuck for rotation thereon. The chuck is connected to the hub and has a non-circular interior surface and a box for supporting a cutting tool for rotation with the chuck. The elongate drive member is disposed within the housing, the hub, and the chuck. The drive member is operatively connected to the inner member of a dual-member drill string for rotation independently of the housing. The drive member has a non-circular external surface corresponding to the non-circular interior surface of the chuck. The pin end of the drive is slidably receivable in connector free torque-transmitting engagement with the interior surface of the chuck to drive rotation of the cutting tool, chuck, and hub independently of the housing.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: April 4, 2017
    Assignee: The Charles Machine Works, Inc.
    Inventors: Greg L. Slaughter, Jr., Travis W. Woodson, Curtis Johnson
  • Publication number: 20160234614
    Abstract: Disclosed herein, among other things, are systems and methods for integrating a living-hinge in a hearing instrument. A system may include a living-hinge cover for a momentary, multi-function switch. The living-hinge switch may be used for volume adjustment. The system may be used to prevent debris ingress or rattling sounds.
    Type: Application
    Filed: February 9, 2016
    Publication date: August 11, 2016
    Inventors: Nathan Curtis Johnson, Thomas Howard Burns
  • Publication number: 20160142057
    Abstract: Compact logic evaluation gates are built using null convention logic (NCL) circuits. The inputs to a null convention circuit include a NCL true input and a NCL complement input. The NCL circuit includes a gate coupled to the pair of inputs, where the gate comprises a plurality of transistors. The transistors allow for logical signal capture, provide a pair of cross-coupled inverters for data storage, and include a first and second pull-down device. The first pull-down device causes a first side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL true input, and the second pull-down device causes a second side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL complement input.
    Type: Application
    Filed: November 14, 2015
    Publication date: May 19, 2016
    Inventors: Benjamin Wiley Melton, Stephen Curtis Johnson