Abstract: A system and method for reducing fatigue, preventing fatigue, or generally supporting a user's head and neck during extended periods of looking downward without restricting a user's range of motion by a user-wearable neck and head support device comprising an adaptable vest optionally configured with straps, back plates, support structures, a customizable bracing rod optionally configured with anchor plates and brackets, an adjustable headpiece with optionally configured accessories, and a wire slidably and detachably coupled to a rail on the headpiece that may be optionally configured with a wire tension controller and a quick release connector.

Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A plurality of dimensions from a tensor is flattened into a single dimension. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. A direct memory access (DMA) engine coupled to the one or more processor clusters is configured. Addresses are generated based on the unique address space descriptors and the common address space descriptor. The plurality of dimensions can be summed to generate a single address. Memory is accessed using two or more of the addresses that were generated. The addresses are used to enable DMA access.

Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A plurality of dimensions from a tensor is flattened into a single dimension. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. A direct memory access (DMA) engine coupled to the one or more processor clusters is configured. Addresses are generated based on the unique address space descriptors and the common address space descriptor. The plurality of dimensions can be summed to generate a single address. Memory is accessed using two or more of the addresses that were generated. The addresses are used to enable DMA access.

Abstract: A coated part, such as a ceramic coated part, having a slot formed in a coating formed on a curvilinear portion of the part and a method of forming the slot. The method includes performing a plurality of laser ablation passes. Each laser ablation pass includes focusing a laser beam to a focus depth, irradiating the coating of the curvilinear portion with the laser beam focused at the focus depth to remove coating material of the coating by laser ablation, and scanning the laser beam in a scanning direction while irradiating the coating of the curvilinear portion with the laser beam. The scanning direction is a direction transverse to a thickness direction of the coating. The focus depth of each subsequent pass of the plurality of laser ablation passes is deeper in a thickness direction of the coating than the pass preceding the subsequent pass.

Abstract: A system for the resilience of an electric submersible pumping system to a transient power interruption includes a power backup connected to the variable speed drive of the pumping system. A method for controlling the electric submersible pump during the transient power interruption includes connecting a variable speed drive to a power source, charging one or more rechargeable batteries within the power backup, and connecting the power backup to the variable speed drive. The method continues with the steps of operating the motor with the variable speed drive, detecting a disruption in AC power from the power source to the variable speed drive, and applying power from the power backup to the variable speed drive to operate the motor during the transient interruption in electrical power.

Abstract: A hearing aid design is described that compartmentalizes hearing aid components for easier use and better operation. In one embodiment, the processing circuitry and transducers are disposed in housing designed to placed in the ear canal so as to be isolated from antennas and sources of noise. In one embodiment, the battery is moved out of the canal in a behind-the-ear housing so that the remaining components in the ear canal are smaller so as to improve fit rate.

Abstract: An inner tube plug for plugging a diamond drill hole. The plug assembly comprises a compressible plunger component attached to one end of a body component, plug feet radially disposed around the body component, and a torsion spring disposed between pairs of adjacent plug feet. The inner tube plug is used to perform down-hole orientation correction of a drill bole, zone bypassing, and completion of a drill hole.

Abstract: A system for the resilience of an electric submersible pumping system to a transient power interruption includes a power backup connected to the variable speed drive of the pumping system. A method for controlling the electric submersible pump during the transient power interruption includes connecting a variable speed drive to a power source, charging one or more rechargeable batteries within the power backup, and connecting the power backup to the variable speed drive. The method continues with the steps of operating the motor with the variable speed drive, detecting a disruption in AC power from the power source to the variable speed drive, and applying power from the power backup to the variable speed drive to operate the motor during the transient interruption in electrical power.

Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A direct memory access (DMA) engine, coupled to the one or more processor clusters, is configured, wherein the DMA engine employs address generation across a plurality of tensor dimensions. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. DMA addresses are generated based on the unique address space descriptors and the common address space descriptor. Memory using two or more of the DMA addresses that were generated is accessed, where the two or more DMA addresses enable processing within the one or more processor clusters.

Abstract: Techniques are disclosed for data manipulation within a reconfigurable computing environment for data flow graph computation using exceptions. Processing elements are configured within a reconfigurable fabric to implement a data flow graph. The processing elements are loaded with process agents. Valid data is executed by a first process agent on a first processing element, where the first process agent corresponds to a starting node of the data flow graph. A second processing element detects that an error exception has occurred, where a second process agent is running on the second processing element. A done signal to a third process agent is withheld by the second process agent, where the third process agent is running on a third processing element. The second process agent raises an interrupt request, where the interrupt request is based on the detecting that an error exception has occurred.

Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A plurality of dimensions from a tensor is flattened into a single dimension. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. A direct memory access (DMA) engine coupled to the one or more processor clusters is configured. Addresses are generated based on the unique address space descriptors and the common address space descriptor. The plurality of dimensions can be summed to generate a single address. Memory is accessed using two or more of the addresses that were generated. The addresses are used to enable DMA access.

Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A direct memory access (DMA) engine, coupled to the one or more processor clusters, is configured, wherein the DMA engine employs address generation across a plurality of tensor dimensions. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. DMA addresses are generated based on the unique address space descriptors and the common address space descriptor. Memory using two or more of the DMA addresses that were generated is accessed, where the two or more DMA addresses enable processing within the one or more processor clusters.

Abstract: An inner lube plug for plugging a diamond drill hole, the plug assembly comprising a body component having proximal and distal ends; a compressible plunger component attached to the distal end of the body component by attachment means; a plurality of plug feet disposed radially around the body component; and a torsion spring disposed between each pair of adjacent plug feet, as well as methods for using the inner tube plug to perform down-hole orientation correction of a drill hole, bypassing (if an impassable zone, and completion of a drill hole.

Abstract: Techniques for data manipulation using filling logic for tensor calculation are disclosed. A processor and a memory subsystem for data manipulation are obtained. A FIFO is configured between the processor and the memory subsystem, where the FIFO is coupled with the processor. FIFO filling logic is configured between the FIFO and the memory subsystem, wherein the FIFO filling logic is connected to the FIFO and the memory subsystem. The processor consumes an element stream from the FIFO, wherein the element stream flows to the FIFO from the memory subsystem through the FIFO filling logic. The element stream from the FIFO comprises elements of a tensor, and the consuming comprises performing tensor calculations. An address is provided to the FIFO filling logic for accessing data from the memory subsystem using an address generator.

Abstract: Techniques are disclosed for data manipulation within a reconfigurable computing environment for data flow graph computation using exceptions. Processing elements are configured within a reconfigurable fabric to implement a data flow graph. The processing elements are loaded with process agents. Valid data is executed by a first process agent on a first processing element, where the first process agent corresponds to a starting node of the data flow graph. A second processing element detects that an error exception has occurred, where a second process agent is running on the second processing element. A done signal to a third process agent is withheld by the second process agent, where the third process agent is running on a third processing element. The second process agent raises an interrupt request, where the interrupt request is based on the detecting that an error exception has occurred.

Abstract: Techniques are disclosed for tensor manipulation within a neural network and include training the neural network. An input tensor is obtained for manipulation within a deep neural network. The input tensor includes fixed-point numerical representations and tensor metadata and is applied to a layer within the deep neural network. The input tensor has variable radix points associated with the fixed-point values of the input tensor. A weighting tensor including metadata is determined for the input tensor applied to the layer. An output tensor is calculated from the layer within the deep neural network based on the input tensor and the weighting tensor. The output tensor has fixed-point values with a second set of variable radix points associated with the fixed-point values of the output tensor. The output tensor includes tensor metadata. The output tensor is propagated within the deep neural network.

Abstract: Techniques are disclosed for tensor radix point calculation in a neural network. A first tensor is obtained. A first set of weights is generated for the first tensor. An operation is evaluated to be performed by a layer within a deep neural network on the first tensor using the first set of weights. A set of output radix points is determined for the layer within the deep neural network based on the first tensor and the operation. An output tensor is calculated for the layer within the deep neural network using the set of output radix points, the first tensor, and the first set of weights. The operation is restarted, when the layer reports a hardware overflow, using an updated set of output radix points. The determining is further based on a radix point for the first tensor. The determining is further based on metadata for the first tensor.

Abstract: Aspects of the subject disclosure include a system that applies magnetic resonance elastography to a sample to obtain uncorrected k-space data where the magnetic resonance elastography utilizes a multi-shot spin-echo sequence with variable density spiral readout gradients, and adjusts the uncorrected k-space data to corrected k-space data by adjusting a k-space trajectory by shifting a center point for each shot to a new center point according to signal intensity and by adjusting a phase for each shot based on a phase offset that is determined according to the signal intensity.

Abstract: A system includes transmission of a first transaction identifier and a first commit identifier to a first data storage system, the first commit identifier identifying a first data snapshot of the first data storage system, transmission of a first query to the first data storage system, transmission of a first prepare instruction and the first transaction identifier to the first data storage system, determination that a first ready response has been received from the first data storage system in response to the first prepare instruction, transmission, in response to the determination, of a first commit instruction and the first transaction identifier to the first data storage system, and reception of a second commit identifier from the first data storage system, the second commit identifier identifying a second data snapshot of the first data storage system.