Abstract: Methods, devices, and systems for controlling a tissue-treatment motion by a surgical instrument are disclosed.

Abstract: A digital memory architecture for recognition and recall in support of a host comprises a plurality of pattern processors, each of which has its own random access memory (RAM) and controller, an external data bus and external data bus controller, a results bus and results bus controller, an internal data bus and internal data bus controller, and an external control bus and external control bus and controller. Each of the pattern processors may be a general purpose set theoretic processor (GPSTP) operating in interrupt and block modes.

Abstract: A general purpose set theoretic processor is enhanced 1) by providing multi-function counters in stead of down-counters, 2) by internalizing the composite Boolean Logic function by introducing a two stage (two matrix) programmable composite Boolean Logic functionality wherein the first stage yields logical products of selected aggregation logic responses (or their complements) and the second stage yields logical sums of selected sets of those logical products, and 3) by providing internal selective re-initialization by means of a re-initialization routing matrix functionality that directs logical sums of Composite Boolean Logic sums of products to selected GPSTP cells to be re-initialized.

Abstract: Multiple thread functionality in a general purpose set theoretic processor (GPSTP) is implemented by addition of a thread memory for processing multiple interleaved data input streams to enable state save-and-restore functionality. The thread memory is functionally distributed among three parts of the GPSTP that change state during execution. The system structure minimizes the number of bits required to be saved and restored, and cell structures are configured implement the multi-thread functionality.

Abstract: A general purpose processor architecture (methods and apparatuses) that can discern all subsets of a serial data stream which fulfill an arbitrarily complex reference pattern. The invention comprises an ordered set of Detection Cells conditionally interconnected according to the reference pattern and operationally controlling one another's states through the network. The invention preferably includes a Host Interface to enable reporting of Results from a search session as well as the input and control of reference patterns and source data.

Abstract: A general purpose processor architecture (methods and apparatuses) that can discern all subsets of a serial data stream which fulfill an arbitrarily complex reference pattern. The invention comprises an ordered set of Detection Cells conditionally interconnected according to the reference pattern and operationally controlling one another's states through the network. The invention preferably includes a Host Interface to enable reporting of Results from a search session as well as the input and control of reference patterns and source data.

Abstract: This invention relates to a gyroscopic centrifuge and mill apparatus having 1) a main mill housing assembly; 2) a material impact means mounted within the main mill housing assembly; and 3) a material conveyor means operable to a) convey raw waste/trash material thereto; b) convey heavy infraction materials initially processed outwardly from the main mill housing assembly; and c) convey the finally processed waste/trash material laterally of the main mill housing assembly. The material impact means is provided with a plurality of spaced adjustable impact blade assemblies mounted on a main upright driven shaft member and being associated with respective separator shelf assemblies in separate waste treatment zones.