Patents by Inventor Curtis Shirota

Curtis Shirota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9819258
    Abstract: Systems and methods for latch-up detection and mitigation. One aspect includes a method implemented in a system divided into a plurality of power blocks, where each power block is powered by a corresponding power rail and includes a voltage droop monitoring circuitry. The method comprises receiving frequency information from the plurality of voltage droop monitoring circuitries; normalizing the received frequency information from each of the plurality of voltage droop monitoring circuitries; creating a matrix of cross-correlation values based on the normalized frequency information between each pair of the plurality of power blocks; determining deviations in the cross-correlation values indicating an occurrence of voltage droop; determining an abnormal variation based on the determined deviations to identify a first power block, out of the plurality of power blocks, experiencing a latch-up event; and resetting power to the first power block without interrupting power to rest of the plurality of power blocks.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: November 14, 2017
    Assignee: Intel Corporation
    Inventors: Clark Vandam, Suriya Kumar, Suraj Sindia, Ricardo Ascazubi, Curtis Shirota