Patents by Inventor Cynthia Tran

Cynthia Tran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7194501
    Abstract: An arithmetic logic unit (ALU) implemented with complementary pass gate logic using propagate, generate, and kill is provided. Broadly speaking, the ALU is a 64-bit ALU using a multi-stage global carry chain to generate intermediate fourth-bit carries that are folded with local four-bit sums to efficiently generate a final sum output. The ALU implements ones complement subtraction by incorporating a subtraction select signal to invert each bit of a second operand. The ALU circuitry implements a push-pull methodology to improve performance.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: March 20, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Sanjay Dubey, Yoganand Chillarige, Shivakumar Sompur, Ban P. Wong, Cynthia Tran
  • Publication number: 20040078417
    Abstract: An arithmetic logic unit (ALU) implemented with complementary pass gate logic using propagate, generate, and kill is provided. Broadly speaking, the ALU is a 64-bit ALU using a multi-stage global carry chain to generate intermediate fourth-bit carries that are folded with local four-bit sums to efficiently generate a final sum output. The ALU implements ones complement subtraction by incorporating a subtraction select signal to invert each bit of a second operand. The ALU circuitry implements a push-pull methodology to improve performance.
    Type: Application
    Filed: October 22, 2002
    Publication date: April 22, 2004
    Applicant: Sun Microsystems, Inc.
    Inventors: Sanjay Dubey, Yoganand Chillarige, Shivakumar Sompur, Ban P. Wong, Cynthia Tran