Patents by Inventor Cyril Buttay

Cyril Buttay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electronic power module comprising a dielectric support
    Patent number: 11049795
    Abstract: A power electronic module (1) including at least one semiconductor (5) that is connected to connection conductors (6, 7), and including a dielectric carrier (10) having both a fixed layer (9), on which at least one of said connection conductors (6) is mounted, and a movable layer (11), the fixed layer (9) and the movable layer (11) exhibiting similar dielectric permittivities and being superposed along at least one surface facing the at least one connection conductor (6).
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: June 29, 2021
    Assignees: Supergrid Institute, Universite Claude Bernard Lyon 1, Ecole Centrale De Lyon, Institut National Des Sciences Appliquees De Lyon, Centre National De La Recherche Scientifique
    Inventor: Cyril Buttay
  • Electronic Power Module Comprising a Dielectric Support
    Publication number: 20190385930
    Abstract: A power electronic module (1) including at least one semiconductor (5) that is connected to connection conductors (6, 7), and including a dielectric carrier (10) having both a fixed layer (9), on which at least one of said connection conductors (6) is mounted, and a movable layer (11), the fixed layer (9) and the movable layer (11) exhibiting similar dielectric permittivities and being superposed along at least one surface facing the at least one connection conductor (6).
    Type: Application
    Filed: January 29, 2018
    Publication date: December 19, 2019
    Inventor: Cyril Buttay
  • Power electronic package having two substrates with multiple semiconductor chips and electronic components
    Patent number: 8432030
    Abstract: A power electronic package includes: first and second high thermal conductivity insulating non-planar substrates; and multiple semiconductor chips and electronic components between the substrates. Each substrate includes multiple electrical insulator layers and patterned electrical conductor layers connecting to the electronic components, and further includes multiple raised regions or posts, which are bonded together so that the substrates are mechanically and electrically connected. The number, arrangement, and shape of the raised regions or posts are adjusted to have mechanical separation between the substrates. The electrical conductor layers are separated and isolated one another so that multiple electric circuits are provided on at least one of the substrates.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: April 30, 2013
    Assignees: DENSO CORPORATION, University of Cambridge, The University of Sheffield
    Inventors: Rajesh Kumar Malhan, C Mark Johnson, Cyril Buttay, Jeremy Rashid, Florin Udrea
  • POWER ELECTRONIC PACKAGE HAVING TWO SUBSTRATES WITH MULTIPLE SEMICONDUCTOR CHIPS AND ELECTRONIC COMPONENTS
    Publication number: 20110254177
    Abstract: A power electronic package includes: first and second high thermal conductivity insulating non-planar substrates; and multiple semiconductor chips and electronic components between the substrates. Each substrate includes multiple electrical insulator layers and patterned electrical conductor layers connecting to the electronic components, and further includes multiple raised regions or posts, which are bonded together so that the substrates are mechanically and electrically connected. The number, arrangement, and shape of the raised regions or posts are adjusted to have mechanical separation between the substrates. The electrical conductor layers are separated and isolated one another so that multiple electric circuits are provided on at least one of the substrates.
    Type: Application
    Filed: June 29, 2011
    Publication date: October 20, 2011
    Applicants: DENSO CORPORATION, The University of Sheffield, University of Cambridge
    Inventors: Rajesh Kumar MALHAN, C Mark JOHNSON, Cyril BUTTAY, Jeremy RASHID, Florin UDREA
  • Power electronic package having two substrates with multiple semiconductor chips and electronic components
    Patent number: 7999369
    Abstract: A power electronic package includes: first and second high thermal conductivity insulating non-planar substrates; and multiple semiconductor chips and electronic components between the substrates. Each substrate includes multiple electrical insulator layers and patterned electrical conductor layers connecting to the electronic components, and further includes multiple raised regions or posts, which are bonded together so that the substrates are mechanically and electrically connected. The number, arrangement, and shape of the raised regions or posts are adjusted to have mechanical separation between the substrates. The electrical conductor layers are separated and isolated one another so that multiple electric circuits are provided on at least one of the substrates.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: August 16, 2011
    Assignees: DENSO CORPORATION, University of Cambridge, The University of Sheffield
    Inventors: Rajesh Kumar Malhan, C. Mark Johnson, Cyril Buttay, Jeremy Rashid, Florin Udrea
  • Power electronic package having two substrates with multiple semiconductor chips and electronic components
    Publication number: 20080054439
    Abstract: A power electronic package includes: first and second high thermal conductivity insulating non-planar substrates; and multiple semiconductor chips and electronic components between the substrates. Each substrate includes multiple electrical insulator layers and patterned electrical conductor layers connecting to the electronic components, and further includes multiple raised regions or posts, which are bonded together so that the substrates are mechanically and electrically connected. The number, arrangement, and shape of the raised regions or posts are adjusted to have mechanical separation between the substrates. The electrical conductor layers are separated and isolated one another so that multiple electric circuits are provided on at least one of the substrates.
    Type: Application
    Filed: August 29, 2006
    Publication date: March 6, 2008
    Applicants: DENSO CORPORATION, University of Cambridge, The University of Sheffield
    Inventors: Rajesh Kumar Malhan, C. Mark Johnson, Cyril Buttay, Jeremy Rashid, Florin Udrea