Abstract: An optical system for detecting and tracking the eye movements of an individual. The system includes a frame, intended to be worn on the face of the individual, that includes a plurality of illumination sources. The system includes at least one contact lens, intended to be worn by an eye of the individual facing the frame, in which are encapsulated: an autonomous integrated circuit, a plurality of photoreceptors and a wireless communication transmitter. Variation in a signal (e.g., voltage or current) delivered by the photoreceptors allows not only the closure of the eyelid but also eye movements to be detected.

Abstract: A contact lens, intended to be worn on the eye of a person, for automatically aiming in the direction of the eye. The contact lens includes:—a membrane suitable for covering the pupil and the iris of the eye;—at least two light sources encapsulated in the membrane, each suitable for emitting a light beam whose divergence is controlled in relation to the axis of the lens;—at least one interface for collecting and supplying electrical energy to the light sources, from outside the lens;—at least one electronic circuit suitable for activating the sources from the interface.

Abstract: An optical system for detecting and tracking the eye movements of an individual. The system includes a frame, intended to be worn on the face of the individual, that includes a plurality of illumination sources. The system includes at least one contact lens, intended to be worn by an eye of the individual facing the frame, in which are encapsulated: an autonomous integrated circuit, a plurality of photoreceptors and a wireless communication transmitter. Variation in a signal (e.g., voltage or current) delivered by the photoreceptors allows not only the closure of the eyelid but also eye movements to be detected.

Abstract: A device for converting radio-frequency energy into DC current, receiving at least one radio-frequency signal at input and generating at output a DC current capable of powering at least one load. The device has at least two conversion stages, each including: a radio-frequency filtering module, connected to a first input node of the conversion stage, configured to filter the radio-frequency signal; a voltage shift module, connected between a second input node of the conversion stage, the radio-frequency filtering module and an intermediate node of the conversion stage, configured to shift a voltage present at the first input node to the intermediate node; a voltage rectifier module, connected between the intermediate note, the second input node and an output node of the conversion stage, configured to rectify the voltage of the intermediate node and deliver a rectified voltage on the output node.

Abstract: A method is provided for encoding data to be sent to at least one receiver, including at least two identical encoding steps and at least one permutation step. Each encoding step associates a block of encoded data with a block of data to be encoded, using at least two basic codes, each code processing a subset of the data block to be encoded. The permutation step is inserted between two encoding steps, i.e. a current encoding step and a previous encoding step, such that the order of the data in a data block to be encoded by the current encoding step is different from the order of the data encoded by the previous encoding step. The permutation step implements, for a data block, a rotation applied to the data of the data block and a reversal of the order of the data of the data block. The operations can be implemented by an interleaving matrix.

Abstract: A method is provided for encoding data to be sent to at least one receiver, including at least two identical encoding steps and at least one permutation step. Each encoding step associates a block of encoded data with a block of data to be encoded, using at least two basic codes, each code processing a subset of the data block to be encoded. The permutation step is inserted between two encoding steps, i.e. a current encoding step and a previous encoding step, such that the order of the data in a data block to be encoded by the current encoding step is different from the order of the data encoded by the previous encoding step. The permutation step implements, for a data block, a rotation applied to the data of the data block and a reversal of the order of the data of the data block. The operations can be implemented by an interleaving matrix.

Abstract: A method and a device (20) for decoding a frame capable of being split into p sub-frames each consisting of k information symbols, a first n?k redundant symbols and a last n?k redundant symbols. The decoding process uses two individual decoders (21, 23) which concurrently produce extrinsic data (Extr1i, Extr2i) respectively concerning information symbols and interleaved information symbols. The values of the extrinsic data (Extr1i, Extr2i) are refined by cross-feedback of said data to the input of the decoders (21, 23).

Abstract: A method and a device (20) for decoding a frame capable of being split into p sub-frames each consisting of k information symbols, a first n?k redundant symbols and a last n?k redundant symbols. The decoding process uses two individual decoders (21, 23) which concurrently produce extrinsic data (Extr1i, Extr2i) respectively concerning information symbols and interleaved information symbols. The values of the extrinsic data (Extr1i, Extr2i) are refined by cross-feedback of said data to the input of the decoders (21, 23).

Abstract: A method and a digital circuit for synthesizing an input signal to produce an output signal are provided. The circuit includes a delay unit with a delay input and a delay output, a switch, and a controller. The selectively switch routes the input signal to the delay input whereafter the switch routes the delay output to the delay input. The controller controls the delay unit in response to the input signal and the output signal. A counter is provided to count a predetermined number of times the delay output is routed to the delay input whereafter the input signal is routed to the delay input to trigger the delay input. The digital circuit synthesizes the input signal to define a Delay-Locked loop (DLL) in which the delay unit is a voltage controlled delay line (VCDL). The invention extends to a computer program product executing the method and to an embedded circuit including the digital circuit.

Abstract: A method and a digital circuit for synthesizing an input signal to produce an output signal are provided. The circuit includes a delay unit with a delay input and a delay output, a switch, and a controller. The selectively switch routes the input signal to the delay input whereafter the switch routes the delay output to the delay input. The controller controls the delay unit in response to the input signal and the output signal. A counter is provided to count a predetermined number of times the delay output is routed to the delay input whereafter the input signal is routed to the delay input to trigger the delay input. The digital circuit synthesizes the input signal to define a Delay-Locked loop (DLL) in which the delay unit is a voltage controlled delay line (VCDL). The invention extends to a computer program product executing the method and to an embedded circuit including the digital circuit.