Patents by Inventor Cyrus Emil TABERY
Cyrus Emil TABERY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12055904Abstract: A method for predicting yield relating to a process of manufacturing semiconductor devices on a substrate, the method including: obtaining a trained first model which translates modeled parameters into a yield parameter, the modeled parameters including: a) a geometrical parameter associated with one or more selected from: a geometric characteristic, dimension or position of a device element manufactured by the process and b) a trained free parameter; obtaining process parameter data including data regarding a process parameter characterizing the process; converting the process parameter data into values of the geometrical parameter; and predicting the yield parameter using the trained first model and the values of the geometrical parameter.Type: GrantFiled: October 30, 2019Date of Patent: August 6, 2024Assignee: ASML NETHERLANDS B.V.Inventors: Youping Zhang, Boris Menchtchikov, Cyrus Emil Tabery, Yi Zou, Chenxi Lin, Yana Cheng, Simon Philip Spencer Hastings, Maxime Philippe Frederic Genin
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Patent number: 12044980Abstract: A method for analyzing a process, the method including obtaining a multi-dimensional probability density function representing an expected distribution of values for a plurality of process parameters; obtaining a performance function relating values of the process parameters to a performance metric of the process; and using the performance function to map the probability density function to a performance probability function having the process parameters as arguments.Type: GrantFiled: October 30, 2019Date of Patent: July 23, 2024Assignee: ASML NETHERLANDS B.V.Inventors: Abraham Slachter, Wim Tjibbo Tel, Daan Maurits Slotboom, Vadim Yourievich Timoshkov, Koen Wilhelmus Cornelis Adrianus Van Der Straten, Boris Menchtchikov, Simon Philip Spencer Hastings, Cyrus Emil Tabery, Maxime Philippe Frederic Genin, Youping Zhang, Yi Zou, Chenxi Lin, Yana Cheng
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Patent number: 11947266Abstract: A method for determining a correction relating to a performance metric of a semiconductor manufacturing process, the method including: obtaining a set of pre-process metrology data; processing the set of pre-process metrology data by decomposing the pre-process metrology data into one or more components which: a) correlate to the performance metric; or b) are at least partially correctable by a control process which is part of the semiconductor manufacturing process; and applying a trained model to the processed set of pre-process metrology data to determine the correction for the semiconductor manufacturing process.Type: GrantFiled: November 14, 2019Date of Patent: April 2, 2024Assignee: ASML NETHERLANDS B.V.Inventors: Nicolaas Petrus Marcus Brantjes, Matthijs Cox, Boris Menchtchikov, Cyrus Emil Tabery, Youping Zhang, Yi Zou, Chenxi Lin, Yana Cheng, Simon Philip Spencer Hastings, Maxim Philippe Frederic Genin
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Publication number: 20230408931Abstract: An apparatus and a method for generating a metrology mark structure that can be formed on a substrate for measuring overlay characteristics induced by one or more processes performed on the substrate by determining features for the metrology mark structure based on a pattern distribution. The method involves obtaining a function to characterize an overlay fingerprint induced by a process performed on a substrate. Based on the function, a pattern distribution is derived, the pattern distribution being indicative of a number of features (e.g., indicative of density) within a portion of the substrate. Based on the pattern distribution, a physical characteristic (e.g., shape, size, etc.) of the features of the metrology mark structure is determined.Type: ApplicationFiled: November 1, 2021Publication date: December 21, 2023Applicant: ASML NETHERLANDS B.V.Inventors: Huaichen ZHANG, Cyrus Emil TABERY
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Patent number: 11803127Abstract: A method for determining a root cause affecting yield in a process for manufacturing devices on a substrate, the method including: obtaining yield distribution data including a distribution of a yield parameter across the substrate or part thereof; obtaining sets of metrology data, each set including a spatial variation of a process parameter over the substrate or part thereof corresponding to a different layer of the substrate; comparing the yield distribution data and metrology data based on a similarity metric describing a spatial similarity between the yield distribution data and an individual set out of the sets of the metrology data; and determining a first similar set of metrology data out of the sets of metrology data, being the first set of metrology data in terms of processing order for the corresponding layers, which is determined to be similar to the yield distribution data.Type: GrantFiled: November 4, 2019Date of Patent: October 31, 2023Assignee: ASML NETHERLANDS B.V.Inventors: Chenxi Lin, Cyrus Emil Tabery, Hakki Ergün Cekli, Simon Philip Spencer Hastings, Boris Menchtchikov, Yi Zou, Yana Cheng, Maxime Philippe Frederic Genin, Tzu-Chao Chen, Davit Harutyunyan, Youping Zhang
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Publication number: 20230341784Abstract: Methods and associated apparatus for identifying contamination in a semiconductor fab. The methods include determining contamination map data for a plurality of semiconductor wafers clamped to a wafer table after being processed in the semiconductor fab. Combined contamination map data is determined based, at least in part, on a combination of the contamination map data of the plurality of semiconductor wafers. The combined contamination map data is combined to reference data. The reference data include one or more values for the combined contamination map data that are indicative of contamination in one or more tools in the semiconductor fab.Type: ApplicationFiled: July 14, 2021Publication date: October 26, 2023Applicant: ASML NETHERLANDS B.V.Inventors: Tijmen Pieter COLLIGNON, Pavel SMAL, Cyrus Emil TABERY, Thiago DOS SANTOS GUZELLA, Vahid BASTANI
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Publication number: 20230335374Abstract: Systems and methods of observing a sample using a charged-particle beam apparatus in voltage contrast mode are disclosed. The charged-particle beam apparatus comprises a charged-particle source, an optical source, a charged-particle detector configured to detect charged particles, and a controller having circuitry configured to apply a first signal to cause the optical source to generate the optical pulse, apply a second signal to the charged-particle detector to detect the second plurality of charged particles, and adjust a time delay between the first and the second signals. In some embodiments, the controller having circuitry may be further configured to acquire a plurality of images of a structure, to determine an electrical characteristic of the structure based on the rate of gray level variation of the plurality of images of the structure, and to simulate, using a model, a physical characteristic of the structure based on the determined electrical characteristic.Type: ApplicationFiled: July 27, 2021Publication date: October 19, 2023Applicant: ASML Netherlands B.V.Inventors: Benoit Herve GAURY, Jun JIANG, Bruno LA FONTAINE, Shakeeb Bin HASAN, Kenichi KANAI, Jasper Frans Mathijs VAN RENS, Cyrus Emil TABERY, Long MA, Oliver Desmond PATTERSON, Jian ZHANG, Chih-Yu JEN, Yixiang WANG
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Publication number: 20230316103Abstract: Methods and apparatus for classifying semiconductor wafers. The method can include: sorting a set of semiconductor wafers, using a model, into a plurality of sub-sets based on parameter data corresponding to one or more parameters of the set of semiconductor wafers, wherein the parameter data for semiconductor wafers in a sub-set include one or more common characteristics; identifying one or more semiconductor wafers within a sub-set based on a probability of the one or more semiconductor wafers being correctly allocated to the sub-set; comparing the parameter data of the one or more identified semiconductor wafers to reference parameter data; and reconfiguring the model based on the comparison. The comparison is undertaken by a human to provide constraints for the model. The apparatus can be configured to undertake the method.Type: ApplicationFiled: June 21, 2021Publication date: October 5, 2023Inventors: Vahid BASTANI, Dimitra GKOROU, Reza SAHRAEIAN, Cyrus Emil TABERY
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Patent number: 11714357Abstract: A method and associated computer program for predicting an electrical characteristic of a substrate subject to a process. The method includes determining a sensitivity of the electrical characteristic to a process characteristic, based on analysis of electrical metrology data including electrical characteristic measurements from previously processed substrates and of process metrology data including measurements of at least one parameter related to the process characteristic measured from the previously processed substrates; obtaining process metrology data related to the substrate describing the at least one parameter; and predicting the electrical characteristic of the substrate based on the sensitivity and the process metrology data.Type: GrantFiled: June 30, 2021Date of Patent: August 1, 2023Assignee: ASML NETHERLANDS B.V.Inventors: Alexander Ypma, Cyrus Emil Tabery, Simon Hendrik Celine Van Gorp, Chenxi Lin, Dag Sonntag, Hakki Ergün Cekli, Ruben Alvarez Sanchez, Shih-Chin Liu, Simon Philip Spencer Hastings, Boris Menchtchikov, Christiaan Theodoor De Ruiter, Peter Ten Berge, Michael James Lercel, Wei Duan, Pierre-Yves Jerome Yvan Guittet
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Publication number: 20220026810Abstract: A method for determining a correction relating to a performance metric of a semiconductor manufacturing process, the method including: obtaining a set of pre-process metrology data; processing the set of pre-process metrology data by decomposing the pre-process metrology data into one or more components which: a) correlate to the performance metric; or b) are at least partially correctable by a control process which is part of the semiconductor manufacturing process; and applying a trained model to the processed set of pre-process metrology data to determine the correction for the semiconductor manufacturing process.Type: ApplicationFiled: November 14, 2019Publication date: January 27, 2022Applicant: ASML NETHERLANDS B.V.Inventors: Nicolaas Petrus Marcus BRANTJES, Matthijs COX, Boris MENCHTCHIKOV, Cyrus Emil TABERY, Youping ZHANG, Yi ZOU, Chenxi LIN, Yana CHENG, Simon Philip Spencer HASTINGS, Maxim Philippe Frederic GENIN
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Publication number: 20220011728Abstract: A method for predicting yield relating to a process of manufacturing semiconductor devices on a substrate, the method including: obtaining a trained first model which translates modeled parameters into a yield parameter, the modeled parameters including: a) a geometrical parameter associated with one or more selected from: a geometric characteristic, dimension or position of a device element manufactured by the process and b) a trained free parameter; obtaining process parameter data including data regarding a process parameter characterizing the process; converting the process parameter data into values of the geometrical parameter; and predicting the yield parameter using the trained first model and the values of the geometrical parameter.Type: ApplicationFiled: October 30, 2019Publication date: January 13, 2022Inventors: Youping ZHANG, Boris MENCHTCHIKOV, Cyrus Emil TABERY, Yi ZOU, Chenxi LIN, Yana CHENG, Simon Philip Spencer HASTINGS, Maxime Philippe Frederic GENIN
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Publication number: 20210397172Abstract: A method for analyzing a process, the method including obtaining a multi-dimensional probability density function representing an expected distribution of values for a plurality of process parameters; obtaining a performance function relating values of the process parameters to a performance metric of the process; and using the performance function to map the probability density function to a performance probability function having the process parameters as arguments.Type: ApplicationFiled: October 30, 2019Publication date: December 23, 2021Applicant: ASML NETHERLANDS B.V.Inventors: Abraham SLACHTER, Wim Tjibbo TEL, Daan Maurits SLOTBOOM, Vadim Yourievich TIMOSHKOV, Koen Wilhelmus Cornelis Adrianus VAN DER STRATEN, Boris MENCHTCHIKOV, Simon Philip Spencer HASTINGS, Cyrus Emil TABERY, Maxime Philippe Frederic GENIN, Youping ZHANG, Yi ZOU, Chenxi LIN, Yana CHENG
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Publication number: 20210389677Abstract: A method for determining a root cause affecting yield in a process for manufacturing devices on a substrate, the method including: obtaining yield distribution data including a distribution of a yield parameter across the substrate or part thereof; obtaining sets of metrology data, each set including a spatial variation of a process parameter over the substrate or part thereof corresponding to a different layer of the substrate; comparing the yield distribution data and metrology data based on a similarity metric describing a spatial similarity between the yield distribution data and an individual set out of the sets of the metrology data; and determining a first similar set of metrology data out of the sets of metrology data, being the first set of metrology data in terms of processing order for the corresponding layers, which is determined to be similar to the yield distribution data.Type: ApplicationFiled: November 4, 2019Publication date: December 16, 2021Applicant: ASML NETHERLANDS B.V.Inventors: Chenxi LIN, Cyrus Emil TABERY, Hakki Ergün CEKLI, Simon Philip Spencer HASTINGS, Boris MENCHTCHIKOV, Yi ZOU, Yana CHENG, Maxime Philippe Frederic GENIN, Tzu-Chao CHEN, Davit HARUTYUNYAN, Youping ZHANG
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Patent number: 11181829Abstract: A method for determining a control parameter for an apparatus used in a semiconductor manufacturing process, the method including: obtaining performance data associated with a substrate subject to the semiconductor manufacturing process; obtaining die specification data including values of an expected yield of one or more dies on the substrate based on the performance data and/or a specification for the performance data; and determining the control parameter in dependence on the performance data and the die specification data. Advantageously, the efficiency and/or accuracy of processes is improved by determining how to perform the processes in dependence on dies within specification.Type: GrantFiled: July 30, 2018Date of Patent: November 23, 2021Assignee: ASML Netherlands B.V.Inventors: Cyrus Emil Tabery, Hakki Ergün Cekli, Simon Hendrik Celine Van Gorp, Chenxi Lin
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Publication number: 20210325788Abstract: A method and associated computer program for predicting an electrical characteristic of a substrate subject to a process. The method includes determining a sensitivity of the electrical characteristic to a process characteristic, based on analysis of electrical metrology data including electrical characteristic measurements from previously processed substrates and of process metrology data including measurements of at least one parameter related to the process characteristic measured from the previously processed substrates; obtaining process metrology data related to the substrate describing the at least one parameter; and predicting the electrical characteristic of the substrate based on the sensitivity and the process metrology data.Type: ApplicationFiled: June 30, 2021Publication date: October 21, 2021Applicant: ASML NETHERLANDS B.V.Inventors: Alexander YPMA, Cyrus Emil TABERY, Simon Hendrik Celine VAN GORP, Chenxi LIN, Dag SONNTAG, Hakki Ergün CEKLI, Ruben ALVAREZ SANCHEZ, Shih-Chin LIU, Simon Philip Spencer HASTINGS, Boris MENCHTCHIKOV, Christiaan Theodoor DE RUITER, Peter TEN BERGE, Michael James LERCEL, Wei DUAN, Pierre-Yves Jerome Yvan GUITTET
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Patent number: 11086229Abstract: A method and associated computer program for predicting an electrical characteristic of a substrate subject to a process. The method includes determining a sensitivity of the electrical characteristic to a process characteristic, based on analysis of electrical metrology data including electrical characteristic measurements from previously processed substrates and of process metrology data including measurements of at least one parameter related to the process characteristic measured from the previously processed substrates; obtaining process metrology data related to the substrate describing the at least one parameter; and predicting the electrical characteristic of the substrate based on the sensitivity and the process metrology data.Type: GrantFiled: March 29, 2018Date of Patent: August 10, 2021Assignee: ASML Netherlands B.V.Inventors: Alexander Ypma, Cyrus Emil Tabery, Simon Hendrik Celine Van Gorp, Chenxi Lin, Dag Sonntag, Hakki Ergün Cekli, Ruben Alvarez Sanchez, Shih-Chin Liu, Simon Philip Spencer Hastings, Boris Menchtchikov, Christiaan Theodoor De Ruiter, Peter Ten Berge, Michael James Lercel, Wei Duan, Pierre-Yves Jerome Yvan Guittet
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Publication number: 20210132508Abstract: A method for determining a control parameter for an apparatus used in a semiconductor manufacturing process, the method including: obtaining performance data associated with a substrate subject to the semiconductor manufacturing process; obtaining die specification data including values of an expected yield of one or more dies on the substrate based on the performance data and/or a specification for the performance data; and determining the control parameter in dependence on the performance data and the die specification data Advantageously, the efficiency and/or accuracy of processes is improved by determining how to perform the processes in dependence on dies within specification.Type: ApplicationFiled: July 30, 2018Publication date: May 6, 2021Applicant: ASML NETHERLANDS B.V.Inventors: Cyrus Emil TABERY, Hakki Ergün CEKLI, Simon, Hendreik Celine VAN GORP, Chenxi Lin
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Publication number: 20210088917Abstract: A measurement mark is disclosed. According to certain embodiments, the measurement mark includes a set of first test structures developed in a first layer on a substrate, each of the set of first test structures comprising a plurality of first features made of first conducting material. The measurement mark also includes a set of second test structures developed in a second layer adjacent to the first layer, each of the set of second test structures comprising a plurality of second features made of second conducting material. The measurement mark is configured to indicate connectivity between the set of first test structures and associated second test structures in the set of second test structures when imaged using a voltage-contrast imaging method.Type: ApplicationFiled: December 7, 2018Publication date: March 25, 2021Inventors: Cyrus Emil TABERY, Simon Hendrik Celine VAN GORP, Simon Philip Spencer HASTINGS, Brennan PETERSON
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Publication number: 20200103761Abstract: A method and associated computer program for predicting an electrical characteristic of a substrate subject to a process. The method includes determining a sensitivity of the electrical characteristic to a process characteristic, based on analysis of electrical metrology data including electrical characteristic measurements from previously processed substrates and of process metrology data including measurements of at least one parameter related to the process characteristic measured from the previously processed substrates; obtaining process metrology data related to the substrate describing the at least one parameter; and predicting the electrical characteristic of the substrate based on the sensitivity and the process metrology data.Type: ApplicationFiled: March 29, 2018Publication date: April 2, 2020Applicant: ASML NETHERLANDS B.V.Inventors: Alexander YPMA, Cyrus Emil TABERY, Simon Hendrik Celine VAN GORP, Chenxi LIN, Dag SONNTAG, Hakki Ergün CEKLI, Ruben ALVAREZ SANCHEZ, Shih-Chin LIU, Simon Philip Spencer HASTINGS, Boris MENCHTCHIKOV, Christiaan Theodoor DE RUTTER, Peter TEN BERGE, Michael James LERCEL, Wei DUAN, Pierre-Yves Jerome Yvan GUITTET