Patents by Inventor D. N. Jayasimha

D. N. Jayasimha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for fast carry generation detection and comparison
    Patent number: 5781465
    Abstract: Two binary two's complement numbers X and Y are compared using half-adders and a parallel prefix-and circuit to find a carry bit that results from forming the sum C+S, where C is the carry word and S is the sum word of the half-adder representation of X+Y. The carry bit is used to calculate the sign of C+S and the sign is used to determine whether X<Y, or X>Y. Additionally, the circuit also indicates when X=Y.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: July 14, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: David R. Lutz, D. N. Jayasimha
  • Programmable modulo k counter
    Patent number: 5719798
    Abstract: A modulo-k counter or frequency divider that produces an output pulse for every k clock pulses. The counter is programmable and synchronous, and is faster than any other programmable frequency divider.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: February 17, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: David R. Lutz, D. N. Jayasimha