Patents by Inventor DVJ Ravi Kumar

DVJ Ravi Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8330631
    Abstract: A method for calibrating a fixed gain amplifier configured as a front-end amplification stage of an analog-to-digital converter including sampling a calibration voltage with normal and inversed polarity and with the fixed gain amplifier bypassed and with the fixed gain amplifier connected. An actual gain value of the fixed gain amplifier is computed from offset corrected digital output codes generated from converting the calibration voltage. A gain correction value for the fixed gain amplifier can then be computed based on the ratio of the actual gain to the ideal gain. In another embodiment, a method for calibrating an analog-to-digital converter including a fixed gain amplifier, an input buffer and a modulator generates an offset correction value using normal and polarity inversed input samples. The offset correct value provides correction for at least offset errors in the fixed gain amplifier, the input buffer and the modulator.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: December 11, 2012
    Assignee: National Semiconductor Corporation
    Inventors: DVJ Ravi Kumar, Priyanka Khasnis, Gururaj Ghorpade, Theertham Srinivas, Srinath B. Pai, Vallamkonda Madhuri
  • Publication number: 20120119930
    Abstract: A method for calibrating a fixed gain amplifier configured as a front-end amplification stage of an analog-to-digital converter including sampling a calibration voltage with normal and inversed polarity and with the fixed gain amplifier bypassed and with the fixed gain amplifier connected. An actual gain value of the fixed gain amplifier is computed from offset corrected digital output codes generated from converting the calibration voltage. A gain correction value for the fixed gain amplifier can then be computed based on the ratio of the actual gain to the ideal gain. In another embodiment, a method for calibrating an analog-to-digital converter including a fixed gain amplifier, an input buffer and a modulator generates an offset correction value using normal and polarity inversed input samples. The offset correct value provides correction for at least offset errors in the fixed gain amplifier, the input buffer and the modulator.
    Type: Application
    Filed: October 19, 2010
    Publication date: May 17, 2012
    Applicant: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: DVJ Ravi Kumar, Priyanka Khasnis, Gururaj Ghorpade, Theertham Srinivas, Srinath B. Pai, Vallamkonda Madhuri
  • Patent number: 7825838
    Abstract: A method for removing component mismatch errors for a system parameter being set by a ratio of two or more physical, electrical components (“components”) of the same kind on an integrated circuit including providing an array of component units having the same component value, determining the actual component values of each component unit in the array, selecting component units based on the actual component values to form pairs of component units where the pairs have approximately the same total component values, ordering the component unit pairs, assigning alternate component unit pairs to be associated with each of the two or more components, rotating at a first frequency the assignment of the component unit pairs. At each rotation, the component unit pairs to be associated with each component are shifted so that each component unit pair is associated with a different one of the two or more components in turn.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: November 2, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Theertham Srinivas, Vallamkonda Madhuri, DVJ Ravi Kumar, Gururaj Ghorpade, Priyanka Khasnis, Mehmet Aslan, Richard Dean Henderson
  • Patent number: 7825837
    Abstract: A method for calibrating an analog-to-digital converter includes sampling an analog input signal and generating input samples, reversing the polarity of at least one input sample, averaging the digital output codes associated with a first pair of input samples where the first pair of input samples has opposite polarities, and generating an offset correction value being the average of the digital output codes associated with the first pair of input samples. In another embodiment, a method for calibrating an ADC includes sampling the analog input signal and generating input samples, introducing an incremental value to modify the magnitude of at least one input sample, computing an actual gain value using the digital output codes associated with a first input sample and a second input sample having the modified magnitude, and generating a gain correction value being the ratio of an ideal gain of the ADC to the actual gain.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: November 2, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Priyanka Khasnis, DVJ Ravi Kumar, Theertham Srinivas, Vallamkonda Madhuri, Gururaj Ghorpade, Mehmet Aslan, Richard Dean Henderson