Abstract: Various embodiments described herein provide for bootloader failure analysis of a memory system using information regarding a failure of the bootloader, where the information is stored on the memory sub-system in response to detection of (e.g., stored at the time of) the failure. In particular, the stored information can comprise data that would be lost or otherwise inaccessible for subsequent diagnostic (e.g., debug) purposes, such as by a manufacturer of the memory sub-system. According to some embodiments, a memory sub-system is configured to save information regarding a failure of a bootloader, to one or more designated memory devices of the memory sub-system, such that diagnostic firmware (e.g., debug firmware) subsequently loaded and executed on the memory sub-system (e.g., by a manufacturer) can make use of the stored information to perform one or more diagnostic functions (e.g., debug functions) on the memory sub-system.

Abstract: Methods, systems, and devices for memory system power management integrated circuitry monitoring are described. A system management controller may poll registers of a power integrated management circuit (PMIC) of a memory system in response to receiving an indication of a failure at the PMIC that may trigger a shutdown condition of the memory system. For example, despite the memory system being in a shutdown condition, power to the registers of the PMIC may remain enabled, and values from the PMIC register may be polled and stored by the system management controller. The values from the PMIC register may indicate a location of the failure of the PMIC or one or more operating parameters of the PMIC during the point of failure. The system management controller may output the stored values from the PMIC registers, which may support identification of root causes of failure at the PMIC.

Abstract: Various embodiments described herein provide for bootloader failure analysis of a memory system using information regarding a failure of the bootloader, where the information is stored on the memory sub-system in response to detection of (e.g., stored at the time of) the failure. In particular, the stored information can comprise data that would be lost or otherwise inaccessible for subsequent diagnostic (e.g., debug) purposes, such as by a manufacturer of the memory sub-system. According to some embodiments, a memory sub-system is configured to save information regarding a failure of a bootloader, to one or more designated memory devices of the memory sub-system, such that diagnostic firmware (e.g., debug firmware) subsequently loaded and executed on the memory sub-system (e.g., by a manufacturer) can make use of the stored information to perform one or more diagnostic functions (e.g., debug functions) on the memory sub-system.

Abstract: Various embodiments described herein provide for bootloader failure analysis of a memory system using information regarding a failure of the bootloader, where the information is stored on the memory sub-system in response to detection of (e.g., stored at the time of) the failure. In particular, the stored information can comprise data that would be lost or otherwise inaccessible for subsequent diagnostic (e.g., debug) purposes, such as by a manufacturer of the memory sub-system. According to some embodiments, a memory sub-system is configured to save information regarding a failure of a bootloader, to one or more designated memory devices of the memory sub-system, such that diagnostic firmware (e.g., debug firmware) subsequently loaded and executed on the memory sub-system (e.g., by a manufacturer) can make use of the stored information to perform one or more diagnostic functions (e.g., debug functions) on the memory sub-system.

Abstract: A system, method and apparatus to optimize repair in a memory module based on hardware errors identified by microprocessors and a configurable error handling policy. For example, the error handling policy can have a configuration file identifying an amount of repair resources available in the memory module as manufactured. Repair status data can be stored in the memory module to determine repair resources currently available for repair. Further, the error handling policy can be configured with a list of high risk memory addresses prioritized for repair. The list can be used to schedule proactive repair in response to memory errors that would otherwise not be repaired during a typical restarting of the computer system having the memory module.

Abstract: A system, method and apparatus to record data relevant to hardware errors identified by microprocessors. For example, in response to a hardware error, a microprocessor can store first data about the error in registers in the microprocessor and start to execute instructions configured in firmware and/or in an operating system. Execution of the instructions in response to the hardware error causes the microprocessor to: generating second data about the error based at least in part on the first data in the registers; and store the second data at a location not affected by restarting execution of an operating system in the processor. For example, the execution of the instructions can cause the microprocessor to decode the first data to obtain a temperature of the computing device as part of the second data.

Abstract: A system, method and apparatus to optimize repair in a memory module based on hardware errors identified by microprocessors and a configurable error handling policy. For example, the error handling policy can have a configuration file identifying an amount of repair resources available in the memory module as manufactured. Repair status data can be stored in the memory module to determine repair resources currently available for repair. Further, the error handling policy can be configured with a list of high risk memory addresses prioritized for repair. The list can be used to schedule proactive repair in response to memory errors that would otherwise not be repaired during a typical restarting of the computer system having the memory module.

Abstract: A system, method and apparatus to record data relevant to hardware errors identified by microprocessors. For example, in response to a hardware error, a microprocessor can store first data about the error in registers in the microprocessor and start to execute instructions configured in firmware and/or in an operating system. Execution of the instructions in response to the hardware error causes the microprocessor to: generating second data about the error based at least in part on the first data in the registers; and store the second data at a location not affected by restarting execution of an operating system in the processor. For example, the execution of the instructions can cause the microprocessor to decode the first data to obtain a temperature the computing device as part of the second data.

Abstract: A battery includes an unpackaged cell and a packaging film, where an edge of the unpackaged cell includes at least one first open space. The first open space runs through a thickness direction of the unpackaged cell. No unpackaged cell exists in the first open space. The packaging film encloses an enclosed space that accommodates the unpackaged cell. The packaging film forms a first sealing part in the first open space. The first sealing part does not cover the unpackaged cell. The first sealing part encloses a second open space with a packaging film on a sidewall of the first open space. The first open space partly overlaps the second open space.

Abstract: The present invention provides a walnut oligopeptide powder, a preparation method and application thereof. The oligopeptide powder has a peptide content of 80 wt % or higher, in which 95% or more of the peptides have a molecular weight of less than 1,500 Da. The method includes extracting walnut proteins using a highly efficient countercurrent extraction process, and subjecting the extract to filtration, enzymolysis, purification with a microfiltration membrane and an ultrafiltration membrane, concentrating, and spray drying to obtain the oligopeptide powder. The oligopeptide powder has an anti-oxidant activity and provides a protective effect for a neuron, and thus can ameliorate or treat memory deterioration and relieve fatigue.

Abstract: The present invention provides a walnut oligopeptide powder, a preparation method and application thereof. The oligopeptide powder has a peptide content of 80 wt % or higher, in which 95% or more of the peptides have a molecular weight of less than 1,500 Da. The method includes extracting walnut proteins using a highly efficient countercurrent extraction process, and subjecting the extract to filtration, enzymolysis, purification with a microfiltration membrane and an ultrafiltration membrane, concentrating, and spray drying to obtain the oligopeptide powder. The oligopeptide powder has an anti-oxidant activity and provides a protective effect for a neuron, and thus can ameliorate or treat memory deterioration and relieve fatigue.