Patents by Inventor Da-Huei Lee

Da-Huei Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180316432
    Abstract: A device for eliminating optical noise receives an optical signal, and includes a first filter which transmits light falling within a same wavelength range as the optical signal, so as to output a filtered signal including the optical signal and first background noise, a second filter which transmits light having a wavelength falling outside the wavelength range of the optical signal, so as to output second background noise, a converter which converts the filtered signal into a first electrical signal and converts the second background noise into a second electrical signal, and an operational unit which performs a mathematical operation on products respectively of the first and second electrical signals and first and second parameters, to result in an output signal.
    Type: Application
    Filed: August 9, 2017
    Publication date: November 1, 2018
    Inventors: Da-Huei LEE, Wei-Wen HU, Hsin-I LEE
  • Patent number: 10097267
    Abstract: A device for eliminating optical noise receives an optical signal, and includes a first filter which transmits light falling within a same wavelength range as the optical signal, so as to output a filtered signal including the optical signal and first background noise, a second filter which transmits light having a wavelength falling outside the wavelength range of the optical signal, so as to output second background noise, a converter which converts the filtered signal into a first electrical signal and converts the second background noise into a second electrical signal, and an operational unit which performs a mathematical operation on products respectively of the first and second electrical signals and first and second parameters, to result in an output signal.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: October 9, 2018
    Assignee: SOUTHERN TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Da-Huei Lee, Wei-Wen Hu, Hsin-I Lee
  • Patent number: 7679539
    Abstract: A randomized thermometer-coding digital-to-analog converter (DAC) for the reduction of harmonic distortion due to non-ideal circuit mismatch is presented. The present invention introduces a new dynamic element matching technique that contains three properties of randomization, consecutive selection and less element switching activity to achieve good spurious-free dynamic range and small maximum output error. The topology uses a bank of 1-bit DAC elements, whose outputs are summed to produce a multi-level analog output. The binary digital input is encoded to be thermometer code. During a randomization period, the thermometer code is barrel-shifted to a specific starting position where the position is generated randomly. Thus, the DAC noise is randomized with less element switching activity and consecutive selection.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: March 16, 2010
    Assignees: Megawin Technology Co., Ltd., National Cheng Kung University
    Inventors: Da-Huei Lee, Tai-Haur Kuo
  • Publication number: 20090243904
    Abstract: A randomized thermometer-coding digital-to-analog converter (DAC) for the reduction of harmonic distortion due to non-ideal circuit mismatch is presented. The present invention introduces a new dynamic element matching technique that contains three properties of randomization, consecutive selection and less element switching activity to achieve good spurious-free dynamic range and small maximum output error. The topology uses a bank of 1-bit DAC elements, whose outputs are summed to produce a multi-level analog output. The binary digital input is encoded to be thermometer code. During a randomization period, the thermometer code is barrel-shifted to a specific starting position where the position is generated randomly. Thus, the DAC noise is randomized with less element switching activity and consecutive selection.
    Type: Application
    Filed: March 25, 2008
    Publication date: October 1, 2009
    Inventors: DA-HUEI LEE, TAI-HAUR KUO
  • Patent number: 7576675
    Abstract: A return-to-zero current-steering DAC is presented. The presented return-to-zero technique can isolate the analog output nodes of the DAC from the coupling of the control signals of the DAC without sacrificing speed. The topology uses a bank of return-to-zero circuits, which employs return-to-zero and isolation transistors to implement the presented return-to-zero technique.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: August 18, 2009
    Assignees: Megawin Technology Co., Ltd., National Cheng Kung University
    Inventors: Da-Huei Lee, Tai-Haur Kuo
  • Patent number: 7295414
    Abstract: A power output device includes a bridged output stage, a reference voltage generator and a detecting unit to compare the output voltages from the aforementioned two units. The bridged output stage may be implemented by a full-bridge or a half-bridge configuration. The reference voltage generator is symmetric to the bridged output stage to generate a reference voltage, which is served as a reference voltage range for the voltage difference of the two terminals of the turned-on transistors in the bridged output stage during operation. When the detecting unit detects the voltages across the two terminals of the turned-on transistors in the bridged output stage exceed the reference voltage range, all the transistors are turned off and no power is outputted to the load. Therefore, the circuit is capable of preventing damages caused by a large current due to overload or short circuit.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: November 13, 2007
    Assignee: Elite Semiconductor Memory Technology Inc.
    Inventors: Cheng-Chung Yang, Da-Huei Lee, Tai-Haur Kuo
  • Publication number: 20070007912
    Abstract: A power output device includes a bridged output stage, a reference voltage generator and a detecting unit to compare the output voltages from the aforementioned two units. The bridged output stage may be implemented by a full-bridge or a half-bridge configuration. The reference voltage generator is symmetric to the bridged output stage to generate a reference voltage, which is served as a reference voltage range for the voltage difference of the two terminals of the turned-on transistors in the bridged output stage during operation. When the detecting unit detects the voltages across the two terminals of the turned-on transistors in the bridged output stage exceed the reference voltage range, all the transistors are turned off and no power is outputted to the load. Therefore, the circuit is capable of preventing damages caused by a large current due to overload or short circuit.
    Type: Application
    Filed: July 7, 2006
    Publication date: January 11, 2007
    Applicant: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
    Inventors: Cheng-Chung Yang, Da-Huei Lee, Tai-Haur Kuo