Abstract: A method includes forming a gate dielectric comprising a portion extending on a semiconductor region, forming a barrier layer comprising a portion extending over the portion of the gate dielectric, forming a work function tuning layer comprising a portion over the portion of the barrier layer, doping a doping element into the work function tuning layer, removing the portion of the work function tuning layer, thinning the portion of the barrier layer, and forming a work function layer over the portion of the barrier layer.

Abstract: A device for eliminating optical noise receives an optical signal, and includes a first filter which transmits light falling within a same wavelength range as the optical signal, so as to output a filtered signal including the optical signal and first background noise, a second filter which transmits light having a wavelength falling outside the wavelength range of the optical signal, so as to output second background noise, a converter which converts the filtered signal into a first electrical signal and converts the second background noise into a second electrical signal, and an operational unit which performs a mathematical operation on products respectively of the first and second electrical signals and first and second parameters, to result in an output signal.

Abstract: A device for eliminating optical noise receives an optical signal, and includes a first filter which transmits light falling within a same wavelength range as the optical signal, so as to output a filtered signal including the optical signal and first background noise, a second filter which transmits light having a wavelength falling outside the wavelength range of the optical signal, so as to output second background noise, a converter which converts the filtered signal into a first electrical signal and converts the second background noise into a second electrical signal, and an operational unit which performs a mathematical operation on products respectively of the first and second electrical signals and first and second parameters, to result in an output signal.

Abstract: A randomized thermometer-coding digital-to-analog converter (DAC) for the reduction of harmonic distortion due to non-ideal circuit mismatch is presented. The present invention introduces a new dynamic element matching technique that contains three properties of randomization, consecutive selection and less element switching activity to achieve good spurious-free dynamic range and small maximum output error. The topology uses a bank of 1-bit DAC elements, whose outputs are summed to produce a multi-level analog output. The binary digital input is encoded to be thermometer code. During a randomization period, the thermometer code is barrel-shifted to a specific starting position where the position is generated randomly. Thus, the DAC noise is randomized with less element switching activity and consecutive selection.

Abstract: A randomized thermometer-coding digital-to-analog converter (DAC) for the reduction of harmonic distortion due to non-ideal circuit mismatch is presented. The present invention introduces a new dynamic element matching technique that contains three properties of randomization, consecutive selection and less element switching activity to achieve good spurious-free dynamic range and small maximum output error. The topology uses a bank of 1-bit DAC elements, whose outputs are summed to produce a multi-level analog output. The binary digital input is encoded to be thermometer code. During a randomization period, the thermometer code is barrel-shifted to a specific starting position where the position is generated randomly. Thus, the DAC noise is randomized with less element switching activity and consecutive selection.

Abstract: A return-to-zero current-steering DAC is presented. The presented return-to-zero technique can isolate the analog output nodes of the DAC from the coupling of the control signals of the DAC without sacrificing speed. The topology uses a bank of return-to-zero circuits, which employs return-to-zero and isolation transistors to implement the presented return-to-zero technique.

Abstract: A power output device includes a bridged output stage, a reference voltage generator and a detecting unit to compare the output voltages from the aforementioned two units. The bridged output stage may be implemented by a full-bridge or a half-bridge configuration. The reference voltage generator is symmetric to the bridged output stage to generate a reference voltage, which is served as a reference voltage range for the voltage difference of the two terminals of the turned-on transistors in the bridged output stage during operation. When the detecting unit detects the voltages across the two terminals of the turned-on transistors in the bridged output stage exceed the reference voltage range, all the transistors are turned off and no power is outputted to the load. Therefore, the circuit is capable of preventing damages caused by a large current due to overload or short circuit.

Abstract: A power output device includes a bridged output stage, a reference voltage generator and a detecting unit to compare the output voltages from the aforementioned two units. The bridged output stage may be implemented by a full-bridge or a half-bridge configuration. The reference voltage generator is symmetric to the bridged output stage to generate a reference voltage, which is served as a reference voltage range for the voltage difference of the two terminals of the turned-on transistors in the bridged output stage during operation. When the detecting unit detects the voltages across the two terminals of the turned-on transistors in the bridged output stage exceed the reference voltage range, all the transistors are turned off and no power is outputted to the load. Therefore, the circuit is capable of preventing damages caused by a large current due to overload or short circuit.