Abstract: A method of manufacturing a metal wire, a method of manufacturing a metal wire grid, a wire grid polarizer, and an electronic device are provided. The method of manufacturing a metal wire includes: forming a metal material layer on a base substrate; etching the metal material layer by using a composite gas including an etching gas and a coating reaction gas to form the metal wire and a protective coating layer on a surface of the metal wire.

Abstract: The present disclosure provides a polarizing device and a method for preparing the same, a display substrate, and a display device. The polarizing device includes: a base substrate, a metal wire grid, and an anti-reflection layer, in which the metal wire grid is arranged on the base substrate, the anti-reflection layer is arranged on the surface of the metal wire grid away from the base substrate, and the anti-reflection layer is a carbon film layer.

Abstract: A method of manufacturing a metal wire, a method of manufacturing a metal wire grid, a wire grid polarizer, and an electronic device are provided. The method of manufacturing a metal wire includes: forming a metal material layer on a base substrate etching the metal material layer by using a composite gas including an etching gas and a coating reaction gas to form the metal wire and a protective coating layer on a surface of the metal wire.

Abstract: The embodiments of the present disclosure provide an array substrate, a preparation method thereof, and a display device. The preparation method of an array substrate comprises: forming the active layer, a gate insulating layer, the gate metal layer and the patterned photoresist sequentially on a substrate; forming a gate electrode transition pattern by etching a gate metal layer via a patterned photoresist, using a wet etching process and a dry etching process sequentially; and doping an area of the active layer not sheltered by the gate electrode transition pattern with ions to form a heavily doped area of the active layer.

Abstract: The present disclosure provides a field of display technologies, and in particular, to a LTPS substrate and a fabricating method thereof, a thin film transistor thereof, an array substrate thereof, and a display device thereof. The LTPS substrate, able to be used for the fabrication of a thin film transistor, includes a light shielding layer, the light shielding layer mainly composed of amorphous silicon doped with a lanthanide element. The present disclosure mainly employs an amorphous silicon film layer doped with the lanthanide element as the light shielding layer of the LTPS substrate, which not only ensures the light shielding efficiency but also reduces the production process, and further prevents the occurrence of the H explosion problem due to H exuding during the ELA process.

Abstract: An array substrate, a method for manufacturing the same, a display panel, and a display device are provided. The array substrate comprises a substrate, a light shielding layer on the substrate, and a transistor arranged at a side of the light shielding layer away from the substrate, the transistor including an active layer.

Abstract: The present disclosure provides a polarizing device and a method for preparing the same, a display substrate, and a display device. The polarizing device includes: a base substrate, a metal wire grid, and an anti-reflection layer, in which the metal wire grid is arranged on the base substrate, the anti-reflection layer is arranged on the surface of the metal wire grid away from the base substrate, and the anti-reflection layer is a carbon film layer.

Abstract: A system and method is provided for facilitate lattice structure design for additive manufacturing carried out through operation of at least one processor. The processor may be configured via executable instructions included in at least one memory to receive a three dimensional (3D) model of an object. The processor may also receive effective mechanical properties for at least a portion of the 3D model to be filled by a lattice producible by a 3D printer configured to produce the object. In addition the processor may determine lattice design parameters based on the received effective mechanical properties for the portion of the design. Or in the opposite direction, the processor may determine the effective mechanical properties based on the lattice design parameter. Further, the processor may modify the 3D model to include the lattice having the determined lattice design parameters for the portion of the 3D model.

Abstract: The present disclosure provides a field of display technologies, and in particular, to a LTPS substrate and a fabricating method thereof, a thin film transistor thereof, an array substrate thereof, and a display device thereof. The LTPS substrate, able to be used for the fabrication of a thin film transistor, includes a light shielding layer, the light shielding layer mainly composed of amorphous silicon doped with a lanthanide element. The present disclosure mainly employs an amorphous silicon film layer doped with the lanthanide element as the light shielding layer of the LTPS substrate, which not only ensures the light shielding efficiency but also reduces the production process, and further prevents the occurrence of the H explosion problem due to H exuding during the ELA process.

Abstract: In various embodiments of the present invention, a method, computer system, and computer program product is implemented to identify a target device that is obtained based on state information of a plurality of ports in the target device, a type of the target device is identified based on the obtained identifier, and the target device is accessed based on the type of the target device.

Abstract: The embodiments of the present disclosure provide an array substrate, a preparation method thereof, and a display device. The preparation method of an array substrate comprises: forming the active layer, a gate insulating layer, the gate metal layer and the patterned photoresist sequentially on a substrate; forming a gate electrode transition pattern by etching a gate metal layer via a patterned photoresist, using a wet etching process and a dry etching process sequentially; and doping an area of the active layer not sheltered by the gate electrode transition pattern with ions to form a heavily doped area of the active layer.

Abstract: In various embodiments of the present invention, a method, computer system, and computer program product is implemented to identify a target device that is obtained based on state information of a plurality of ports in the target device, a type of the target device is identified based on the obtained identifier, and the target device is accessed based on the type of the target device.

Abstract: The present invention provides a multilevel read-only optical disk and the method for producing the same. The multilevel read-only optical disk comprises a plurality of the recording pits, each of the longitudinal sections of the recording pits has a multilevel arbitrary shape; the areas of the longitudinal sections of the recording pits are not identical each other; the area of each of the longitudinal sections of the recording pits is defined by the following formula: S=?h(x)dx, where S represents the area of each of the longitudinal sections of the recording pits, x represents the coordinate value along the width direction of the recording pits, h(x) represents the pit-depth distribution function of the longitudinal sections of the recording pits and the region of the integration covers the whole longitudinal sections of the recording pits. Furthermore, the run length of the multilevel read-only optical disk is limited.

Abstract: The present invention provides a multilevel read-only optical disk and the method for producing the same. The multilevel read-only optical disk comprises a plurality of the recording pits, each of the longitudinal sections of the recording pits has a multilevel arbitrary shape; the areas of the longitudinal sections of the recording pits are not identical each other; the area of each of the longitudinal sections of the recording pits is defined by the following formula: S=?h(x)dx, where S represents the area of each of the longitudinal sections of the recording pits, x represents the coordinate value along the width direction of the recording pits, h(x) represents the pit-depth distribution function of the longitudinal sections of the recording pits and the region of the integration covers the whole longitudinal sections of the recording pits. Furthermore, the run length of the multilevel read-only optical disk is limited.