Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.

Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.

Abstract: A data storage device may include a memory device including a plurality of memory blocks having a plurality of free memory blocks and a controller configured to control an operation of the memory device, wherein the controller performs a block allocation operation of allocating one or more free memory blocks among the plurality of free memory blocks as one or more programmable memory blocks, and performs a garbage collection (GC) error defense operation of checking whether a GC operation for the plurality of memory blocks has performed successfully, in response to the block allocation operation.

Abstract: There are provided a memory controller and a memory system having the same. A memory controller includes: an internal memory for storing error injection information for an error test operation and error test information that is a result of the error test operation; and a central processing unit for receiving first sector data from a host, and performing an error test operation on a memory device according to the error injection information, when the error injection information is included in the first sector data.

Abstract: A data storage device may include a memory device including a plurality of memory blocks having a plurality of free memory blocks and a controller configured to control an operation of the memory device, wherein the controller performs a block allocation operation of allocating one or more free memory blocks among the plurality of free memory blocks as one or more programmable memory blocks, and performs a garbage collection (GC) error defense operation of checking whether a GC operation for the plurality of memory blocks has performed successfully, in response to the block allocation operation.

Abstract: There are provided a memory controller and a memory system having the same. A memory controller includes: an internal memory for storing error injection information for an error test operation and error test information that is a result of the error test operation; and a central processing unit for receiving first sector data from a host, and performing an error test operation on a memory device according to the error injection information, when the error injection information is included in the first sector data.

Abstract: There are provided a memory controller and a memory system having the same. A memory controller includes: an internal memory for storing error injection information for an error test operation and error test information that is a result of the error test operation; and a central processing unit for receiving first sector data from a host, and performing an error test operation on a memory device according to the error injection information, when the error injection information is included in the first sector data.

Abstract: There are provided a memory controller and a memory system having the same. A memory controller includes: an internal memory for storing error injection information for an error test operation and error test information that is a result of the error test operation; and a central processing unit for receiving first sector data from a host, and performing an error test operation on a memory device according to the error injection information, when the error injection information is included in the first sector data.