Abstract: Disclosed is a mobile terminal (MT) for acquiring information related to an image photographed through the MT's camera module. The MT captures a desired image in the photographed image, and either internally searches for information related to the captured image or transmits an information request to an information server via MT the Internet or a wireless network. Upon receiving the captured image from the mobile terminal, the information server recognizes an image pattern or a character from the captured image, and searches for information related thereto. Alternatively, upon receiving an image pattern or a character, the information server searches for information related to the received image pattern or character. The information server transmits the searched information to the MT, and the MT displays the received information for the user.

Abstract: An apparatus for driving a plasma display panel includes a first driver and a second driver and a first power supplier and a second power supplier for generating sustain discharge pulses having no negative (?) level. The first driver includes a first capacitor charged to a first voltage and is coupled to a power source for supplying a voltage Vs and a ground voltage. The first driver, coupled to one terminal of a panel capacitor, operates to alternately apply double the voltage Vs formed by the power source and the first capacitor and the ground voltage to the one terminal of the panel capacitor. The second power supplier, coupled to the power source and the ground voltage, includes a second capacitor charged to Vs. The second driver coupled to the other terminal of the panel capacitor operates to alternately apply double the voltage Vs formed by the power source and the second capacitor and the ground voltage to the other terminal of the panel capacitor.

Abstract: A method for realizing a user interface using a camera module and a mobile communication terminal for the same. If a user makes a predetermined motion in a state in which the camera module of the mobile communication terminal is activated, the mobile communication terminal performs a predetermined action according to the motion pattern by recognizing the user motion and patterning the motion. In this case, the action performed according to the motion pattern corresponds to mouse control in a mouse mode, game control in a game mode, and character input in a character input mode.

Abstract: A mobile terminal authenticates a user using a camera module included therein. If a particular locked function is selected by a user, a controller enables the camera module and receives a motion pattern from the user through the camera module. The controller compares the motion pattern received through the camera module with a motion pattern previously stored in a memory. and the controller unlocks the locked function and enables the corresponding function if the motion patterns are identical to each other.

Abstract: An apparatus for driving a plasma display panel includes a first driver and a second driver and a first power supplier and a second power supplier for generating sustain discharge pulses having no negative (?) level. The first driver includes a first capacitor charged to a first voltage and is coupled to a power source for supplying a voltage Vs and a ground voltage. The first driver, coupled to one terminal of a panel capacitor, operates to alternately apply double the voltage Vs formed by the power source and the first capacitor and the ground voltage to the one terminal of the panel capacitor. The second power supplier, coupled to the power source and the ground voltage, includes a second capacitor charged to Vs. The second driver coupled to the other terminal of the panel capacitor operates to alternately apply double the voltage Vs formed by the power source and the second capacitor and the ground voltage to the other terminal of the panel capacitor.

Abstract: An input circuit includes an input signal transmission circuit configured to output a first transmission signal at a first output node in response to an input signal at an input node, and a Schmitt trigger inverter configured to output a second transmission signal at a second output node in response to the first transmission signal. The input signal transmission circuit includes a voltage drop element connected to the input node and configured to provide a voltage drop between the input node and a transistor having a gate to which a first supply voltage is applied.

Abstract: A wire harness connector in which at least one guide, the upper surface of which is inclined such that the upper surface becomes higher from the front end of the guide to the rear end of the guide, is formed on the side surface of a central portion of a locking member, and at least one sliding wall for gradually pressing the guide as the interconnection between a plug housing and a cap housing progresses is formed on the cap housing at a position corresponding to the position of the guide. Even when the locking member is not completely assembled with the plug housing due to worker carelessness, the cap housing is easily connected to the locking member by the sliding of the guide along the sliding wall, and the locking member is seated in the plug housing at a correct position simultaneously with the connection so that the secondary fixation of terminals by the locking member is completely performed.

Abstract: A wire harness connector in which at least one guide, the upper surface of which is inclined such that the upper surface becomes higher from the front end of the guide to the rear end of the guide, is formed on the side surface of a central portion of a locking member, and at least one sliding wall for gradually pressing the guide as the interconnection between a plug housing and a cap housing progresses is formed on the cap housing at a position corresponding to the position of the guide. Even when the locking member is not completely assembled with the plug housing due to worker carelessness, the cap housing is easily connected to the locking member by the sliding of the guide along the sliding wall, and the locking member is seated in the plug housing at a correct position simultaneously with the connection so that the secondary fixation of terminals by the locking member is completely performed.

Abstract: In an embodiment, an LVDS (Low Voltage Differential Signaling) receiver includes at least one LVDS input buffer, a clock generating unit, and a bias circuit. The clock generating unit includes a voltage controlled oscillator for generating a clock signal tracking a frequency of data received via the at least one LVDS input buffer based on a control voltage. The bias circuit controls current sources that supply current to at least one differential amplifier in the at least one LVDS input buffer based on the control voltage of the clock signal generating unit. Therefore, the LVDS receiver can save current consumed in LVDS input buffers by controlling the amount of current supplied to the at least one differential amplifier included in the at least one LVDS input buffers.

Abstract: A technique for driving a PDP, which includes scan and sustain electrodes arranged in pairs, data electrodes arranged alternately with the scan electrodes, and sub-fields for one TV field to display a multi-gradation, includes applying a reset pulse voltage to the sustain electrodes, applying a first voltage alternately to the scan electrodes and the sustain electrodes to cause a sustain discharge, and after applying a second voltage to the sustain electrodes or removing part of the first voltage applied to the sustain electrodes, applying third and fourth voltages to the scan electrodes and the data electrodes, respectively, before applying the first voltage, to erase wall charges in cells defined by the sustain electrodes, the data electrodes, and the scan electrodes.

Abstract: A technique for driving a PDP, which includes scan and sustain electrodes arranged in pairs, data electrodes arranged alternately with the scan electrodes, and sub-fields for one TV field to display a multi-gradation, includes applying a reset pulse voltage to the sustain electrodes, applying a first voltage alternately to the scan electrodes and the sustain electrodes to cause a sustain discharge, and after applying a second voltage to the sustain electrodes or removing part of the first voltage applied to the sustain electrodes, applying third and fourth voltages to the scan electrodes and the data electrodes, respectively, before applying the first voltage, to erase wall charges in cells defined by the sustain electrodes, the data electrodes, and the scan electrodes.

Abstract: A plasma display module constructed with a chassis base; a plasma display panel supported by the chassis base in front of the chassis base to display an image; a circuit board on which a plurality of circuit devices that drive the plasma display panel are mounted, supported by the chassis base behind the chassis base; and a connection cable electrically connecting the circuit board and the plasma display panel, and directly grounded to the chassis base. Therefore, the module will be electrically stable when driven because of its grounding structure, and is suitable for providing images of high resolution.

Abstract: An input/output buffer is operative in an analog mode and a digital mode. The buffer includes a pad, a digital signal line which includes a transmission gate connected to the pad, an analog signal line connected to the pad, an analog/digital mode controller which sets an output level of the digital signal line in the analog mode, and a transmission gate controller which controls the transmission gate when a signal voltage of the pad exceeds a reference voltage.

Abstract: An input/output buffer is operative in an analog mode and a digital mode. The buffer includes a pad, a digital signal line which includes a transmission gate connected to the pad, an analog signal line connected to the pad, an analog/digital mode controller which sets an output level of the digital signal line in the analog mode, and a transmission gate controller which controls the transmission gate when a signal voltage of the pad exceeds a reference voltage.

Abstract: In a clock squarer having a semiconductor chip pad and a square wave generating circuit, the clock squarer can generate a square wave having stable duty, irrespective of variation in temperature, process or supply voltage. In the clock squarer, a capacitor is provided between the chip pad and the square wave generating circuit. The clock squarer in accordance with the present invention is especially applicable to processes that involve high leakage current or a fabrication process for products requiring high-speed operation.

Abstract: A signal transmission circuit, which is capable of improving DC characteristics, delay characteristics, and linearity in a voltage region and maintaining tolerant functions, is provided. The signal transmission circuit includes a first transmission circuit, a second transmission circuit, an inverting circuit, a first switching circuit, and a second switching circuit. The first transmission circuit transmits a signal of a first node to a second node, and the second transmission circuit transmits the signal of the first node to the second node. The inverting circuit inverts the signal of the second node, and the first switching circuit pulls down a third node in response to an output signal of the inverting circuit. The second switching circuit transmits the signal of the first node to the third node, and the second transmission circuit is controlled in response to the signal of the third node.

Abstract: A technique for driving a PDP, which includes scan and sustain electrodes arranged in pairs, data electrodes arranged alternately with the scan electrodes, and sub-fields for one TV field to display a multi-gradation, includes applying a reset pulse voltage to the sustain electrodes, applying a first voltage alternately to the scan electrodes and the sustain electrodes to cause a sustain discharge, and after applying a second voltage to the sustain electrodes or removing part of the first voltage applied to the sustain electrodes, applying third and fourth voltages to the scan electrodes and the data electrodes, respectively, before applying the first voltage, to erase wall charges in cells defined by the sustain electrodes, the data electrodes, and the scan electrodes.

Abstract: A signal transmission circuit, which is capable of improving DC characteristics, delay characteristics, and linearity in a voltage region and maintaining tolerant functions, is provided. The signal transmission circuit includes a first transmission circuit, a second transmission circuit, an inverting circuit, a first switching circuit, and a second switching circuit. The first transmission circuit transmits a signal of a first node to a second node, and the second transmission circuit transmits the signal of the first node to the second node. The inverting circuit inverts the signal of the second node, and the first switching circuit pulls down a third node in response to an output signal of the inverting circuit. The second switching circuit transmits the signal of the first node to the third node, and the second transmission circuit is controlled in response to the signal of the third node.

Abstract: Integrated circuits having built-in electrostatic discharge protection thyristors include a semiconductor substrate with well regions of predetermined conductivity type therein which enable the formation of pairs of built-in thyristors which provided overvoltage protection. The substrate preferably contains first and second well regions of first and second conductivity type, respectively, at spaced locations, and third and fourth well regions of second and first conductivity type, respectively, which form respective P-N junctions with the first and second well regions. A first pair of guard regions of opposite conductivity type is also formed in the third well region, and this first pair of guard regions is electrically coupled to a first reference potential. In addition, a second pair of guard regions of opposite conductivity type is formed in the fourth well region and this pair of guard regions is electrically connected to a second reference potential.