Patents by Inventor Dae Hong

Dae Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110165761
    Abstract: Example methods and example embodiments include methods of fabricating semiconductor devices and semiconductor devices fabricated by the same. Example fabricating methods include forming a first nanowire, oxidizing the first nanowire to form a first nanostructure including a first insulator and a second nanowire, and oxidizing the second nanowire to form a second nanostructure including a second insulator and nanodots. Example semiconductor devices include nanostructures including nanodots and nanostructures providing storage nodes in memory devices.
    Type: Application
    Filed: December 6, 2010
    Publication date: July 7, 2011
    Inventors: Myung-Jong KIM, In-Seok Yeo, Dae-Hong Ko, Hyun-Chul Sohn, Mann-Ho Cho, Sang-Yeon Kim
  • Publication number: 20110128401
    Abstract: A digital photographing apparatus and a method of controlling the same. The digital photographing apparatus includes: a first display unit disposed on a rear surface of the digital photographing apparatus; a second display unit disposed on a front surface of the digital photographing apparatus; and a digital signal processing unit for turning on the second display unit if a face is detected in an input image.
    Type: Application
    Filed: November 18, 2010
    Publication date: June 2, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Myung-kyu Choi, Dae-hong Ki
  • Publication number: 20110072908
    Abstract: The present invention relates to an instrument for measuring torsion moment per a single-pole cylindrical foundation, including: a force-applying means that applies horizontal force to structures protruding from the ground; a tension means that is connected with the force-applying means to apply tensile force to the structures; a measuring unit that is disposed inside the structures to measure strain per depth and portion due to force applied from the force-applying means and the tension means; and a controller that analyzes moment per depth of the structures from horizontal force measured by the measuring unit.
    Type: Application
    Filed: September 15, 2010
    Publication date: March 31, 2011
    Applicant: KOREA ELECTRIC POWER CORPORATION
    Inventors: Dae Hong KIM, Gi Dae OH, Dae Soo LEE, Kyoung Yul KIM, Sung Yun HONG, Moo Sung RYU, Dae Hak KIM
  • Publication number: 20110059609
    Abstract: A method of fabricating a two-terminal semiconductor component using a trench technique is disclosed that includes forming a trench by etching an etching pattern formed on a substrate on which an active layer having impurities added is grown, forming a front metal layer on a front upper surface of the substrate by using an evaporation method or a sputtering method after removing the etching pattern, forming a metal plated layer on the front surface of the substrate on which the front metal layer is formed, polishing a lower surface of the substrate by using at least one of a mechanical polishing method and a chemical polishing method until the front metal layer is exposed, forming a rear metal layer on the polished substrate, and removing each component by using at least one of a dry etching method and a wet etching method.
    Type: Application
    Filed: October 22, 2009
    Publication date: March 10, 2011
    Applicant: Dongguk University Industry-Academic Cooperation Foundation
    Inventors: Jin-Koo Rhee, Seong-Dae Lee, Mi-Ra Kim, Dae-Hong Min
  • Publication number: 20100321683
    Abstract: There is provided a method for manufacturing a surface enhanced Raman scattering nano-tagging particle, the method including the steps of: introducing silver nanoparticles on the surface of a silica core particle; immobilizing tagging materials and silica shell precursors on the silver nanoparticles; and forming a silica shell surrounding the silica core particle to which the tagging materials and the silica shell precursor are immobilized.
    Type: Application
    Filed: September 29, 2006
    Publication date: December 23, 2010
    Applicant: Seoul National University Industry Foundation
    Inventors: Yoon-Sik Lee, Dae-Hong Jeong, Jong-Ho Kim, Hee-Jeong Choi, Sang-Myung Lee
  • Publication number: 20100157096
    Abstract: An apparatus to automatically tag an image and a method thereof conveniently classifies images by acquiring information of a tag image when an image is photographed and stored, automatically adding tag information to the photographed image based on the information of a tag image, generating an image file, and storing the image file. The apparatus and method acquire an image and record a photographed image based on classification information of an image which is automatically tagged when the image is acquired and stored.
    Type: Application
    Filed: November 17, 2009
    Publication date: June 24, 2010
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Wan-je PARK, Dae-hong Ki, Hyun-kook Jang
  • Publication number: 20100072067
    Abstract: Provided is a method for screening a biological molecule rapidly and economically with high-throughput using microbeads encoded with silver nanoparticles and a chemical compound and dielectrophoresis. A biological screening method particularly utilizes microbeads encoded with silver nanoparticles and a specific chemical compound and dielectrophoresis. Since this screening method does not use a fluorescent material and a dying agent, which are typically used in the conventional screening method, it is non-toxic and economical. Also, this screening method allows simultaneous identification of many target materials. Accordingly, a leading compound can be screened within a short period of time, and thus, this screening method can be implemented as an economical and effective system for developing new pharmaceutical products.
    Type: Application
    Filed: September 15, 2006
    Publication date: March 25, 2010
    Applicant: Seoul National Univeristy Industry Foundation
    Inventors: Yoon-Sik Lee, Yong-Kweon Kim, Dae-Hong Jeong, Jong-Ho Kim, Min-Soo Kim, Hee-Jeong Choi, Bong-Hyun Jun
  • Publication number: 20100020312
    Abstract: Provided is a detection apparatus of Raman scattering and light scattering, and more particularly, a simultaneous detection apparatus of Raman scattering and dynamic light scattering and a detection method using the same. The simultaneous detection apparatus of Raman scattering and light scattering includes: a detection unit for applying incident light to a sample, and detecting Raman scattering in 90° or 180° geometry and light scattering in 90° or 180° geometry in order to simultaneously collect Raman scattering and light scattering; and a computer connected to the detection unit to obtain at least one of the size and distribution of particles from the detected light scattering, and to obtain information of the molecular structure from the detected Raman scattering.
    Type: Application
    Filed: August 30, 2007
    Publication date: January 28, 2010
    Inventors: Dae-Hong Jeong, Yoon-Sik Lee, Myung-Haing Cho, Yong-Kweon Kim
  • Publication number: 20090321798
    Abstract: Disclosed are a CMOS sensor and a method of fabricating the CMOS sensor. The method includes the steps of: forming a first USG layer on an entire surface of a semiconductor substrate including a cell area and a scribe area; masking the cell area, and then removing the first USG layer formed on the scribe area; forming a SiN layer on the entire surface of the semiconductor substrate; masking the cell area, and then removing the SiN layer formed on the scribe area; forming a second USG layer on the entire surface of the semiconductor substrate; and masking the scribe area, and then removing the second USG layer formed on the cell area. The USG layer is only formed on the scribe layer without the SiN layer, so that SiN particles do not drop onto the USG layer during the sintering process.
    Type: Application
    Filed: September 3, 2009
    Publication date: December 31, 2009
    Inventor: Dae Hong MIN
  • Publication number: 20090280641
    Abstract: An insulation layer may be formed on an object having a contact region. The insulation layer may be partially etched to form an opening exposing the contact region. A material layer including silicon and oxygen may be formed on the exposed contact region. A metal layer may be formed on the material layer including silicon and oxygen. The material layer including silicon and oxygen may be reacted with the metal layer to form a metal oxide silicide layer at least on the contact region. A conductive layer may be formed on the metal oxide silicide layer to fill up the opening.
    Type: Application
    Filed: May 7, 2009
    Publication date: November 12, 2009
    Inventors: Dae-Hyuk Kang, Young-Hoo Kim, Chang-Ki Hong, Kun-Tack Lee, Jae-Dong Lee, Dae-Hong Eom, Jeong-Nam Han
  • Patent number: 7605016
    Abstract: Disclosed are a CMOS sensor and a method of fabricating the CMOS sensor. The method includes the steps of: forming a first USG layer on an entire surface of a semiconductor substrate including a cell area and a scribe area; masking the cell area, and then removing the first USG layer formed on the scribe area; forming a SiN layer on the entire surface of the semiconductor substrate; masking the cell area, and then removing the SiN layer formed on the scribe area; forming a second USG layer on the entire surface of the semiconductor substrate; and masking the scribe area, and then removing the second USG layer formed on the cell area. The USG layer is only formed on the scribe layer without the SiN layer, so that SiN particles do not drop onto the USG layer during the sintering process.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: October 20, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Dae Hong Min
  • Publication number: 20090196383
    Abstract: A correlation apparatus and method for frequency synchronization are provided. A frequency synchronization method of a receiver in a broadband wireless access communication system includes acquiring a highest correlation value by conducting a differential correlation of a variable interval between a received signal and a reference signal and performing a frequency synchronization according to the highest correlation value.
    Type: Application
    Filed: January 30, 2009
    Publication date: August 6, 2009
    Applicants: SAMSUNG ELECTRONICS CO. LTD., SUNGKYUNKWAN UNIVERSITY Foundation for Corporate Collaboration
    Inventors: Hee-Jin ROH, Jeoung-Gil LEE, Su-Jin YOON, Hoon KANG, Chang-Hyun BAIK, Jun-Kyu KANG, Hyung-Jin CHOI, Se-Bin IM, Dae-Hong LEE
  • Publication number: 20090168238
    Abstract: Provided is an information storage medium using a ferroelectric, including a substrate having an amorphous crystal structure, an electrode layer formed on the substrate, and a ferroelectric layer in a (001) direction formed on the electrode layer.
    Type: Application
    Filed: July 2, 2008
    Publication date: July 2, 2009
    Applicants: SAMSUNG ELECTRONICS CO., LTD, POHANG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Yong-kwan KIM, Dae-hong KIM, Sung-gi BAIK, Seung-bum HONG
  • Patent number: 7550378
    Abstract: A method for manufacturing a semiconductor device including providing a semiconductor substrate including a cell area formed with relatively high device element density and a scribe line area formed with a device element density lower than the device element density of the cell area. An insulating layer is deposited over the semiconductor substrate. The insulating layer is planarized through a chemical mechanical polishing (CMP) process including a first polishing step and a second polishing step having different removal rates with respect to the insulating layer formed over the cell area and the scribe area.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: June 23, 2009
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Dae Hong Min
  • Publication number: 20090025755
    Abstract: Example embodiments relate to a method of treating a substrate after performing a cleaning step with a liquid chemical in a single substrate spin cleaner. A method of treating a substrate according to example embodiments may include forming a film of deionized water on a surface of the substrate during rinsing, and drying the substrate by supplying a drying gas to the water film on the surface of the substrate. When rinsing the substrate, the rotating speed of the substrate may be reduced to about 50 rpm or less to form a film of water on the surface of the substrate. The film of water may shield the surface of the substrate from direct exposure to atmospheric air. The film of water may be maintained on the surface of the substrate when commencing the supply of the drying gas. Consequently, the number of water marks on the dried substrate may be reduced or prevented.
    Type: Application
    Filed: July 24, 2008
    Publication date: January 29, 2009
    Inventors: Dae-Hong Eom, Chang-Ki Hong, Woo-Gwan Shim, Young-Ok Kim
  • Publication number: 20090020875
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate in which a first interlayer insulation layer having a first via hole and a first trench is formed. The semiconductor device also includes a first via plug and a first metal line respectively formed by filling the first via hole and the first trench with a first metal, a predetermined scratch being formed on the first metal line; and a second via plug a second metal line respectively formed by filling a second via hole and a second trench with a second metal, the second metal lines being separated.
    Type: Application
    Filed: August 27, 2008
    Publication date: January 22, 2009
    Inventor: Min Dae Hong
  • Patent number: 7432190
    Abstract: A method for manufacturing a semiconductor device includes: preparing a substrate in which a first interlayer insulation layer having a first via hole and a first trench is formed; forming a first via plug and a first metal line by filling the first via hole and the first trench with a first metal; planarizing the first metal line and the first interlayer insulation layer; forming a second interlayer insulation layer on the first metal line and the first interlayer insulation layer; planarizing the second interlayer insulation layer; forming a second via hole and a second trench in the second interlayer insulation layer; forming a second via plug and a second metal line by filling the second via hole and the second trench with a second metal; and planarizing the second metal line and the second interlayer insulation layer.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: October 7, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Min Dae Hong
  • Publication number: 20070148969
    Abstract: A method for manufacturing a semiconductor device including providing a semiconductor substrate including a cell area formed with relatively high device element density and a scribe line area formed with a device element density lower than the device element density of the cell area. An insulating layer is deposited over the semiconductor substrate. The insulating layer is planarized through a chemical mechanical polishing (CMP) process including a first polishing step and a second polishing step having different removal rates with respect to the insulating layer formed over the cell area and the scribe area.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Inventor: Dae Hong Min
  • Patent number: 7233379
    Abstract: Disclosed is a pixel structure of a liquid crystal display including: a first substrate with red, green and blue color filters; a second substrate comprising; a TFT; a data bus line carrying a data signal that is applied to the TFT to drive unit pixels; and a gate bus line in which a bump-shaped groove is formed at a region where the gate bus line crosses and overlaps the data bus line to prevent the data bus line from opening and through which a gate signal is applied: wherein current is selectively supplied to the pixel electrode of the unit pixel region defined by the gate bus line and the data bus line so that an electric field is generated between the first substrate and the second substrate; and a liquid crystal layer between the first substrate and the second substrate.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: June 19, 2007
    Assignee: LG.Philips LCD Co., Ltd.
    Inventors: Dae Hong Kim, Jong Seo Yoon, Ki Cheol Seo, Hyun Jin Park
  • Publication number: 20060062285
    Abstract: The present invention relates to a demodulation method for enhancing decoding performance of information bits in a constant-amplitude multi-code biorthogonal modulation communication system, which performs encoding to cause the level of a transmission symbol to be constant. In the demodulation method of the present invention, a demodulator demodulates the received signal, the demodulator having four blocks. C (c?2k, k is the number of information bits) bit streams with higher correlation values in descending order are selected and combined among demodulated bit streams to establish c4 bit stream candidates. A parity check is performed with respect to the c4 bit stream candidates, a candidate group having a maximal sum of correlation values is selected among candidate groups in which any error is not generated at the parity check. A bit stream corresponding to the selected candidate group is determined to be an output of a receiver.
    Type: Application
    Filed: November 24, 2004
    Publication date: March 23, 2006
    Inventors: Een Hong, Jin Cho, Sung Kang, Dae Hong, Yong Kim, Min Ju, Sung Kim, Myoung Kim