Abstract: A semiconductor memory device includes a mold structure including gate electrodes stacked on a first substrate, a channel structure that penetrates a first region of the mold structure to cross the gate electrodes, a first through structure that penetrates a second region of the mold structure, and a second through structure that penetrates a third region of the mold structure. The mold structure further includes memory cell blocks extending in a first direction and spaced apart in a second direction, and a dummy block extending in the first direction and disposed between the memory cell blocks. Each of the memory cell blocks and the dummy block includes a cell region and an extension region arranged in the first direction. The first region is the cell region of one of the memory cell blocks, the second region is the extension region of the one of the memory cell blocks, and the third region is the extension region of the dummy block.

Abstract: Embodiments relate to a polymer film. The polymer film comprises a polymer resin selected from the group consisting of a polyamide-based resin and a polyimide-based resin and has a haze (HZ0) before autoclave treatment of 3% or less and a ?HZ24 represented by Equation 1a of 500% or less.

Abstract: A semiconductor package according to an embodiment includes a first insulating layer; and a first through electrode part passing through the first insulating layer and having a shape elongated in a first direction; wherein the first through electrode part includes a plurality of first through electrodes spaced apart from each other in a second direction perpendicular to the first direction and a thickness direction; wherein at least one of the plurality of first through electrodes includes a first sub through electrode and a second sub through electrode spaced apart from each other in the first direction; and wherein at least one of the first sub through electrode and the second sub through electrode has a width in the first direction greater than a width in the second direction.

Abstract: A semiconductor package includes a first package substrate having a first region and a second region, which do not overlap each other, a first connection element having a first height on the first region, a first semiconductor chip having a second height connected to the first connection element, a second connection element having a third height on the second region, a third connection element having a fourth height on the second connection element and electrically connected to the second connection element, a second package on the third connection element, the second package including a second package substrate and a second semiconductor chip, and a first mold layer covering at least a portion of the first semiconductor chip, covering at least a portion of the second connection element, covering the first package substrate, exposing upper surfaces of the first semiconductor chip and the second connection element, and having a fifth height.

Abstract: A method for controlling an electric heater of a vehicular heating, ventilation, and air conditioning (HVAC) system includes turning on the electric heater; determining whether an ambient air temperature of a vehicle is higher than or equal to a threshold ambient air temperature, and a battery temperature is lower than or equal to a threshold battery temperature; determining whether battery efficiency is lower than or equal to threshold efficiency when the ambient air temperature of the vehicle is higher than or equal to the threshold ambient air temperature, and the battery temperature is lower than or equal to the threshold battery temperature; and turning off the electric heater when the battery efficiency is lower than or equal to the threshold efficiency, wherein the electric heater is configured to receive electric energy from the battery.

Abstract: A mold structure includes gate electrodes stacked on a first substrate, a channel structure penetrating a first region of the mold structure to cross the gate electrodes, a first through structure penetrating a second region of the mold structure, and a second through structure penetrating a third region of the mold structure. The mold structure includes memory cell blocks extending in a first direction and spaced apart in a second direction, and a dummy block extending in the first direction and disposed between the memory cell blocks. Each of the memory cell and dummy blocks includes a cell region and an extension region arranged in the first direction. The first region is the cell region of one of the memory cell blocks, the second region is the extension region of the one of the memory cell blocks, and the third region is the extension region of the dummy block.

Abstract: Proposed are a substrate processing apparatus and a substrate processing method capable of efficiently preventing contamination of a substrate and a processing space caused by a reverse flow of purge gas.

Abstract: A semiconductor package includes a wiring structure including a first insulating layer and a first wiring pad. The first wiring pad is in the first insulating layer. The package includes a semiconductor chip on the wiring structure, and an interposer on the semiconductor chip. The interposer includes a second insulating layer and a second wiring pad, and the second wiring pad is in the second insulating layer. The package includes a first connecting structure including a first metal layer and a second metal layer surrounding the first metal layer. The first metal layer includes a lower metal layer adjacent to the wiring structure and an upper metal layer adjacent to the interposer, and the first connecting structure connects the first wiring pad and the second wiring pad. The package includes a mold layer between the wiring structure and the interposer.

Abstract: A mountable plant cultivation apparatus capable of being mounted on an outer surface of a mounting object, according to the present invention, comprises: a housing disposed along an outer surface of a mounting object to have an adjustable length; and a planting part which is disposed in one side of the housing and in which a plant is planted.

Abstract: Disclosed is a curved display device that may include a display panel having a curvature between a top frame and a bottom frame; a printed circuit board (PCB) electrically connected to at least one edge portion of the display panel where driving circuits and signal lines are provided through a connector; and a reinforcing frame that supports a rear surface of the bottom frame, the reinforcing frame including a reinforcing bar substantially following the curvature of the display panel, wherein the reinforcing bar has a step to include first and second rear surfaces, with the first rear surface being closer to the display panel than the second rear surface, and wherein the PCB is mounted on the first rear surface of the reinforcing bar.

Abstract: Disclosed is a curved display device that may include a display panel having a curvature between a top frame and a bottom frame; a printed circuit board (PCB) electrically connected to at least one edge portion of the display panel where driving circuits and signal lines are provided through a connector; and a reinforcing frame that supports a rear surface of the bottom frame, the reinforcing frame including a reinforcing bar substantially following the curvature of the display panel, wherein the reinforcing bar has a step to include first and second rear surfaces, with the first rear surface being closer to the display panel than the second rear surface, and wherein the PCB is mounted on the first rear surface of the reinforcing bar.

Abstract: Disclosed is a free folding bed in which a support panel with a mattress arranged thereon includes a plurality of divided parts and which is freely foldable and unfoldable in vertical and horizontal directions, and more particularly, to a free folding bed in which a back support unit, a thigh support unit and the like of a support panel may be folded in a vertical direction in a state where the support panels were folded in a horizontal direction and which may be freely folded or unfolded in the vertical and horizontal directions and thus transformed according to a user or protector's intention, thereby significantly improve convenience.

Abstract: A modulator phase shift keying modulator for performing data modulation by using the phase difference of each I/Q channel, comprising a data shifter for controlling delay of I/Q channel digital data at input terminals of the I/Q channels.

Abstract: A modulator phase shift keying modulator for performing data modulation by using the phase difference of each I/Q channel, comprising a data shifter for controlling delay of I/Q channel digital data at input terminals of the I/Q channels.

Abstract: An analog to digital converter (ADC) circuit suitable for processing serial data at a fast rate includes a clock control block for receiving a reference strobe signal REF_STB, a reference clock signal REF_CLK, and number of bit control signals CONT—1, CONT—2. The clock control block outputs first and second internal clock signals CLK_A, and CLK_B, and a forwarding direction control signal CONT—3. The ADC circuit also includes a parallel analog to digital converter for receiving and converting analog signal into a parallel digital data synchronously with the first internal clock signal CLK_A. A parallel to serial transform logic control block then transforms the parallel digital data into serial digital data synchronously with the second internal clock signal CLK_B.

Abstract: A voltage offset compensating device of a CDMA (Code Division Multiple Access) communication system transmitter is provided which is capable of compensating voltage offset by measuring real voltage of channels at a CDMA communication system transmitter and compensating for a voltage offset with a feedback loop. The voltage offset compensating device of the CDMA communication system transmitter includes a codec unit that converts a signal received from a microphone into a digital signal, a modem unit that converts the signal received from the codec unit into a digital signal adaptable to the CDMA method of communication by compensating voltage offset of the signal, and a BBA (Base Band Analog) unit that converts the digital signal received from the modem unit into an analog signal.

Abstract: A disclosed serial data transmission apparatus includes a transceiver for encoding source data D1 to be transmitted, performing a first cyclic redundancy checking (CRC) operation on the encoded data D1′, combining a detection data d1 generated by the first cyclic redundancy checking (CRC) operation and the encoded data D1′ generated by the encoding, and outputting a combined data (D1′+d1). The serial data transmission apparatus also includes a receiver for separating the combined data (D1′+d1) received from the transceiver into data D1′ and d1, concurrently performing a decoding operation of the separated data D1′ and a second cyclic redundancy checking operation of the separated data D1′, comparing the separated data d1 with a detection data d1′ generated by the second cyclic redundancy checking operation, judging whether the decoded data D1 is correct, and outputting the decoded data D1 as a received data.

Abstract: A cyclic analog/digital converter includes a first multiplexer for selectively outputting an analog signal and a first input signal pursuant to a control signal; a sample/hold unit for sampling/holding an output signal from the first multiplexer; a doubling amplifier for amplifying an output signal from the sample/hold unit; a first comparator for comparing an output signal from the doubling amplifier with a reference voltage; a second multiplexer for selectively outputting the reference voltage and a ground voltage pursuant to an output signal from the first comparator; a voltage subtracter for subtracting output signals from the doubling amplifier and the second multiplexer, and providing the first input signal to the first multiplexer; and a mis-operation detector for detecting a mis-operation of the first comparator, and controlling an operation of the first multiplexer.