Patents by Inventor Dae-Hyuk Chung

Dae-Hyuk Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11957697
    Abstract: Disclosed is a viral receptor that contains a sialic acid compound at one side thereof to provide binding affinity to a virus, and contains a lipid at the other side thereof, and that can be widely used for the treatment of viral infections based on this characteristic.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: April 16, 2024
    Assignee: MVRIX CO., LTD.
    Inventors: Woo Jae Chung, Dae Hyuk Kweon, Jinhyo Chung, Caleb Hong
  • Patent number: 9760083
    Abstract: The apparatus for detecting damage to the tool in the machine and the method of detecting damage to the tool according to the present disclosure are applied to a machine, such as a CNC, to detect and control damage to a tool and possibility of damage in advance, thereby efficiently managing processing work by the machine while achieving safety of the machine.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: September 12, 2017
    Assignee: Doosan Machine Tools Co., Ltd.
    Inventors: Dae Hyuk Chung, Dae Jung Sung
  • Patent number: 9684299
    Abstract: The present disclosure relates to a system and a method for managing machine tool information for heterogeneous numerical control devices, and more particularly, to a system and a method for managing machine tool information for heterogeneous numerical control devices which may manage data of heterogeneous numerical control devices by a mobile device through a network, such as a wide area Internet or local WiFi, and monitor an operational state of the machine tool.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: June 20, 2017
    Assignee: Doosan Machine Tools Co., Ltd.
    Inventors: Dae Hyuk Chung, Jang Nam Han, Jong Tae Kim, Jong Myoung Park, Joo Sik Lee
  • Patent number: 9507340
    Abstract: A tool path part program modification system of an NC machine tool according to an aspect of the present disclosure, includes: a human-machine interface unit which receives a tool path part program having one or more processing blocks; an NC kernel unit which interprets the part program inputted to the human-machine interface unit for each processing block, and generates each processing block information; a tool path modification module unit which sequentially calls the processing block information interpreted by the NC kernel unit, and modifies a consecutive rapid transfer processing block group such that tool paths are reduced, when the consecutive rapid transfer processing block group is present in which the predetermined reference number or more of processing blocks including rapid transfer commands are consecutively included; and a simulator unit which simulates the part program for each processing block interpreted by the NC kernel unit.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: November 29, 2016
    Assignee: Doosan Machine Tools Co., Ltd.
    Inventors: Dae Hyuk Chung, Jong Myoung Park, Joo Sik Lee
  • Patent number: 8962455
    Abstract: A method of fabricating a semiconductor device includes forming a first preliminary gate barrier layer and a first preliminary gate electrode recessed to have a first depth from the surface of the substrate within a gate trench, removing an upper portion of the first preliminary gate electrode by means of a first wet etching process using a first etchant to form a second preliminary gate electrode recessed to have a second depth greater than the first depth, and removing an upper portion of the first preliminary gate barrier layer and an upper portion of the second preliminary gate electrode by means of a second wet etching process using a second etchant to form a gate electrode and a gate barrier layer recessed to a third depth greater than the second depth.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: February 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Hyun Choi, Jin-Ho Noh, Yoon-Ho Son, Dae-Hyuk Chung, In-Seak Hwang, Tae-Joon Park, Tae-Ho Hwang
  • Publication number: 20140371898
    Abstract: The present disclosure relates to a system and a method for managing machine tool information for heterogeneous numerical control devices, and more particularly, to a system and a method for managing machine tool information for heterogeneous numerical control devices which may manage data of heterogeneous numerical control devices by a mobile device through a network, such as a wide area Internet or local WiFi, and monitor an operational state of the machine tool.
    Type: Application
    Filed: October 18, 2012
    Publication date: December 18, 2014
    Inventors: Dae Hyuk Chung, Jang Nam Han, Jong Tae Kim, Jong Myoung Park, Joo Sik Lee
  • Patent number: 8723297
    Abstract: In a semiconductor device having an enlarged contact area between a contact structure and a substrate, the substrate may include a first region on which a conductive structure is arranged and a second region defining the first region. The first region may include a multi-faced polyhedral recess of which at least one of the sidewalls is slanted with respect to a surface of the substrate. An insulation layer may be formed on the substrate to a thickness that is sufficient to cover the conductive structure. The insulation layer has a contact hole that may be communicated with the recess. The active region of the substrate is exposed through the contact hole. A conductive pattern is positioned in the recess and the contact hole. Accordingly, the contact resistance at the active region of the substrate may be kept to a relatively low value even though the gap distances and line width of pattern lines are reduced.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: May 13, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Ho Son, Mong-Sup Lee, In-Seak Hwang, Dae-Hyuk Chung, Suk-Hun Choi, Sang-Jun Lee
  • Publication number: 20130341710
    Abstract: A method of fabricating a semiconductor device includes forming a first preliminary gate barrier layer and a first preliminary gate electrode recessed to have a first depth from the surface of the substrate within a gate trench, removing an upper portion of the first preliminary gate electrode by means of a first wet etching process using a first etchant to form a second preliminary gate electrode recessed to have a second depth greater than the first depth, and removing an upper portion of the first preliminary gate barrier layer and an upper portion of the second preliminary gate electrode by means of a second wet etching process using a second etchant to form a gate electrode and a gate barrier layer recessed to a third depth greater than the second depth.
    Type: Application
    Filed: June 18, 2013
    Publication date: December 26, 2013
    Inventors: Sang-Hyun CHOI, Jin-Ho NOH, Yoon-Ho SON, Dae-Hyuk CHUNG, In-Seak HWANG, Tae-Joon PARK, Tae-Ho HWANG
  • Patent number: 8551288
    Abstract: In an apparatus and method for removing a photoresist structure from a substrate, a chamber for receiving the substrate includes a showerhead for uniformly distributing a mixture of water vapor and ozone gas onto the substrate. The showerhead includes a first space having walls and configured to receive the water vapor, and a second space connected to the first space so that the water vapor is supplied to and partially condensed into liquid water on one or more walls of the first space. Ozone gas and water vapor without liquid water may be supplied to the second space to form the mixture therein. The showerhead may be heated to vaporize the liquid water on a given surface of the first space.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: October 8, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-Gi Kim, In-Seak Hwang, Dae-Hyuk Chung, Kyoung-Hwan Kim
  • Publication number: 20130253694
    Abstract: A tool path part program modification system of an NC machine tool according to an aspect of the present disclosure, includes: an HMI unit which receives a tool path part program having one or more processing blocks which automate and perform tool paths for processing a work piece by using tools of the NC machine tool; an NC kernel unit which interprets the part program inputted to the HMI unit for each processing block, and generates each processing block information; a tool path modification module unit which sequentially calls the processing block information interpreted by the NC kernel unit, and modifies a consecutive rapid transfer processing block group such that tool paths are reduced and collision between the tool and the work piece does not occur, when the consecutive rapid transfer processing block group is present in which the predetermined reference number or more of processing blocks including rapid transfer commands are consecutively included; and a simulator unit which simulates the part progr
    Type: Application
    Filed: November 1, 2011
    Publication date: September 26, 2013
    Applicant: DOOSAN INFRACORE CO., LTD.
    Inventors: Dae Hyuk Chung, Jong Myoung Park, Joo Sik Lee
  • Publication number: 20130253670
    Abstract: The apparatus for detecting damage to the tool in the machine and the method of detecting damage to the tool according to the present disclosure are applied to a machine, such as a CNC, to detect and control damage to a tool and possibility of damage in advance, thereby efficiently managing processing work by the machine while achieving safety of the machine.
    Type: Application
    Filed: November 1, 2011
    Publication date: September 26, 2013
    Applicant: DOOSAN INFRACORE CO., LTD.
    Inventors: Dae Hyuk Chung, Dae Jung Sung
  • Publication number: 20120025283
    Abstract: In a semiconductor device having an enlarged contact area between a contact structure and a substrate, the substrate may include a first region on which a conductive structure is arranged and a second region defining the first region. The first region may include a multi-faced polyhedral recess of which at least one of the sidewalls is slanted with respect to a surface of the substrate. An insulation layer may be formed on the substrate to a thickness that is sufficient to cover the conductive structure. The insulation layer has a contact hole that may be communicated with the recess. The active region of the substrate is exposed through the contact hole. A conductive pattern is positioned in the recess and the contact hole. Accordingly, the contact resistance at the active region of the substrate may be kept to a relatively low value even though the gap distances and line width of pattern lines are reduced.
    Type: Application
    Filed: July 7, 2011
    Publication date: February 2, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yoon-Ho Son, Mong-Sup Lee, In-Seak Hwang, Dae-Hyuk Chung, Suk-Hun Choi, Sang-Jun Lee
  • Publication number: 20100301263
    Abstract: A slurry composition for a chemical mechanical polishing process and a method of manufacturing a semiconductor memory device using the slurry composition are provided. The slurry composition may include about 0.001 percent by weight to about 5 percent by weight of a ceria abrasive, about 0.001 percent by weight to about 0.1 percent by weight of a nonionic surfactant adsorbed onto a polysilicon layer forming a passivation layer on the polysilicon layer, the nonionic surfactant having a chemical structure of a triblock copolymer including a first polyethylene oxide block, a polypropylene oxide block and a second polyethylene oxide block and a remainder of water.
    Type: Application
    Filed: August 10, 2010
    Publication date: December 2, 2010
    Inventors: Choong-Kee Seong, Dae-Hyuk Chung, Myang-Sik Han
  • Patent number: 7799687
    Abstract: A slurry composition for a chemical mechanical polishing process and a method of manufacturing a semiconductor memory device using the slurry composition are provided. The slurry composition may include about 0.001 percent by weight to about 5 percent by weight of a ceria abrasive, about 0.001 percent by weight to about 0.1 percent by weight of a nonionic surfactant adsorbed onto a polysilicon layer forming a passivation layer on the polysilicon layer, the nonionic surfactant having a chemical structure of a triblock copolymer including a first polyethylene oxide block, a polypropylene oxide block and a second polyethylene oxide block and a remainder of water.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Choong-Kee Seong, Dae-Hyuk Chung, Myang-Sik Han
  • Patent number: 7573132
    Abstract: A wiring structure of a semiconductor device may have an insulation layer, a spacer and a plug. The insulation layer may be provided on a substrate and may have an opening through which a contact region of the substrate is exposed. The spacer may be provided on a sidewall of the opening. The plug may fill the opening and may include a polysilicon pattern doped with impurities, a metal silicide pattern, and a metal pattern sequentially provided on the substrate.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: August 11, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Hyuk Chung, In-Seak Hwang
  • Patent number: 7527921
    Abstract: Example embodiments of the present invention relate to methods of treating and removing a photoresist pattern and a method of manufacturing a semiconductor device using the same. Other example embodiments of the present invention relate to a method of treating a photoresist pattern and a method of removing a photoresist pattern formed using a photoresist composition suitable for argon fluoride (ArF). In a method of removing a photoresist pattern, an ozone vapor including a water vapor and an ozone gas may be provided onto the photoresist pattern to remove a hydrophobic group from a photoresist resin included in the photoresist pattern. A cleaning solution may be provided to make the photoresist pattern water-soluble. A cleaning process may be performed on the photoresist pattern to remove the photoresist pattern. The photoresist pattern may be effectively removed without an increased processing time and/or damage to a substrate.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: May 5, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Hyuk Chung, Dae-Keun Kang, Se-Ho Cha
  • Publication number: 20080281463
    Abstract: The present invention relates to a method of creating a non-linear process plan and an Internet-based STEP-NC system using the same, and more particularly, to a method of creating a non-linear process plan, wherein the non-linear process plan including information on a variety of alternative processes and machining sequences is established in consideration of situations in the field, thereby autonomously dealing with abnormal situations while executing optimal machining, and to an Internet-based STEP-NC system, wherein a STEP-NC part program in an XML format is created based on the established process plan so that process information can be easily exchanged with other systems via the Internet. Since the present invention provide a plurality of machining alternatives to the field, and thus, allow a STEP-NC machine tool to execute machining optimized depending on field situations and to autonomously deal with abnormal situations that may occur during machining.
    Type: Application
    Filed: January 31, 2006
    Publication date: November 13, 2008
    Inventors: Suk hwan Suh, Dae hyuk Chung, Byeong eon Lee
  • Publication number: 20080264566
    Abstract: In an apparatus and method for removing a photoresist structure from a substrate, a chamber for receiving the substrate includes a showerhead for uniformly distributing a mixture of water vapor and ozone gas onto the substrate. The showerhead includes a first space having walls and configured to receive the water vapor, and a second space connected to the first space so that the water vapor is supplied to and partially condensed into liquid water on one or more walls of the first space. Ozone gas and water vapor without liquid water may be supplied to the second space to form the mixture therein. The showerhead may be heated to vaporize the liquid water on a given surface of the first space.
    Type: Application
    Filed: June 25, 2008
    Publication date: October 30, 2008
    Inventors: In-Gi Kim, In-Seak Hwang, Dae-Hyuk Chung, Kyoung-Hwan Kim
  • Patent number: 7405164
    Abstract: In an apparatus and method for removing a photoresist structure from a substrate, a chamber for receiving the substrate includes a showerhead for uniformly distributing a mixture of water vapor and ozone gas onto the substrate. The showerhead includes a first space having walls and configured to receive the water vapor, and a second space connected to the first space so that the water vapor is supplied to and partially condensed into liquid water on one or more walls of the first space. Ozone gas and water vapor without liquid water may be supplied to the second space to form the mixture therein. The showerhead may be heated to vaporize the liquid water on a given surface of the first space.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: July 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-Gi Kim, In-Seak Hwang, Dae-Hyuk Chung, Kyoung-Hwan Kim
  • Publication number: 20080096393
    Abstract: An apparatus for etching a semiconductor substrate may include a bath, a reaction preventing layer, and a nozzle. The bath may receive a chemical solution. Grooves may be formed at the inner wall of the bath. The reaction preventing layer may be formed on the inner wall and in the grooves of the bath to reduce or prevent a chemical reaction between the chemical solution and the bath. The nozzle may supply the chemical solution to the bath. In a method of etching a semiconductor substrate, the semiconductor substrate having trench structures and an insulation layer pattern may be prepared. The semiconductor substrate may then be dipped into the bath having the reaction preventing layer in which the chemical solution is received. The semiconductor substrate may be reacted with the chemical solution by blocking the chemical reaction between the chemical solution and the bath to etch the insulation layer pattern and the trench structure at a uniform rate.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 24, 2008
    Inventors: In-Gi Kim, Dae-Hyuk Chung, Dae-Hyuk Kang