Patents by Inventor Dae-hyuk Kang

Dae-hyuk Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7704828
    Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a mold for forming a storage electrode, forming sacrificial spacers at side walls of openings in the mold, forming a conductive film for a storage electrode along the inside of the openings, removing the mold by a wet etching process, removing the sacrificial spacers by a dry etching process, and sequentially forming a dielectric film and an upper electrode on the storage electrode.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: April 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Min Oh, Jeong-Nam Han, Chang-Ki Hong, Kun-Tack Lee, Dae-Hyuk Kang, Sung-Il Cho
  • Publication number: 20090280641
    Abstract: An insulation layer may be formed on an object having a contact region. The insulation layer may be partially etched to form an opening exposing the contact region. A material layer including silicon and oxygen may be formed on the exposed contact region. A metal layer may be formed on the material layer including silicon and oxygen. The material layer including silicon and oxygen may be reacted with the metal layer to form a metal oxide silicide layer at least on the contact region. A conductive layer may be formed on the metal oxide silicide layer to fill up the opening.
    Type: Application
    Filed: May 7, 2009
    Publication date: November 12, 2009
    Inventors: Dae-Hyuk Kang, Young-Hoo Kim, Chang-Ki Hong, Kun-Tack Lee, Jae-Dong Lee, Dae-Hong Eom, Jeong-Nam Han
  • Patent number: 7498217
    Abstract: In a method of manufacturing a semiconductor device such as a SONOS type semiconductor device, a trench is formed on a substrate. An isolation layer protruding from the substrate is formed to fill the trench. After a first layer is formed on the substrate, a preliminary second layer pattern is formed on the first layer. The preliminary second layer pattern has an upper face substantially lower than or substantially equal to an upper face of the isolation layer. A third layer is formed on the preliminary second layer and the isolation layer. A fourth layer is formed on the third layer. The fourth layer, the third layer, the preliminary second layer pattern and the first layer are partially etched to form a gate structure on the substrate. Source/drain regions are formed at portions of the substrate adjacent to the gate structure.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: March 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Min Oh, Jeong-Nam Han, Chang-Ki Hong, Kun-Tack Lee, Dae-Hyuk Kang, Woo-Gwan Shim, Jong-Won Lee
  • Patent number: 7459370
    Abstract: In one aspect, a method of fabricating a semiconductor memory device is provided which includes forming a mold insulating film over first and second portions of a semiconductor substrate, where the mold insulating film includes a plurality of storage node electrode holes spaced apart over the first portion of the semiconductor substrate. The method further includes forming a plurality of storage node electrodes on inner surfaces of the storage node electrode holes, respectively, and forming a capping film which covers the storage node electrodes and a first portion of the mold insulating film located over the first portion of the semiconductor substrate, and which exposes a second portion of the mold insulating film located over the second portion of the semiconductor substrate.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: December 2, 2008
    Assignee: Samsung Electronics Co., ltd.
    Inventors: Dae-hyuk Kang, Jung-min Oh, Chang-ki Hong, Sang-jun Choi, Woo-gwan Shim
  • Publication number: 20080138972
    Abstract: A method of removing a photoresist may include permeating supercritical carbon dioxide into the photoresist on a substrate having a conductive structure including a metal. The photoresist permeating the supercritical carbon dioxide may be easily removable. The photoresist permeating the supercritical carbon dioxide may be removed using a photoresist cleaning solution from the substrate. The photoresist cleaning solution may include an alkanolamine solution of about 8 percent by weight to about 20 percent by weight, a polar organic solution of about 25 percent by weight to about 40 percent by weight, a reducing agent of about 0.5 percent by weight to about 3 percent by weight with the remainder being water. The photoresist may be easily removed without damaging the conductive structure in a plasma process.
    Type: Application
    Filed: November 16, 2007
    Publication date: June 12, 2008
    Inventors: Dae-Hyuk Kang, Hyo-San Lee, Dong-Gyun Han, Chang-Ki Hong, Kun-Tack Lee
  • Publication number: 20080096393
    Abstract: An apparatus for etching a semiconductor substrate may include a bath, a reaction preventing layer, and a nozzle. The bath may receive a chemical solution. Grooves may be formed at the inner wall of the bath. The reaction preventing layer may be formed on the inner wall and in the grooves of the bath to reduce or prevent a chemical reaction between the chemical solution and the bath. The nozzle may supply the chemical solution to the bath. In a method of etching a semiconductor substrate, the semiconductor substrate having trench structures and an insulation layer pattern may be prepared. The semiconductor substrate may then be dipped into the bath having the reaction preventing layer in which the chemical solution is received. The semiconductor substrate may be reacted with the chemical solution by blocking the chemical reaction between the chemical solution and the bath to etch the insulation layer pattern and the trench structure at a uniform rate.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 24, 2008
    Inventors: In-Gi Kim, Dae-Hyuk Chung, Dae-Hyuk Kang
  • Publication number: 20080044971
    Abstract: A method for fabricating a semiconductor device is disclosed. The method includes forming an etch stop layer on a substrate, forming a mold layer on the substrate, and forming an opening exposing the substrate by patterning the mold layer and the etch stop layer, wherein the opening includes a lower portion defined by the etch stop layer and a middle portion. The method further includes enlarging the lower portion by etching a side portion of the etch stop layer exposed by the opening using an etching solution including sulfuric acid and water; and forming a lower electrode on an inner surface of the opening including the enlarged lower portion, wherein, after enlarging the lower portion, a width of the lower portion is greater than a width of the middle portion.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 21, 2008
    Applicant: SAMSUNG ELECTRONICS CO,. LTD.
    Inventors: Dae-Hyuk KANG, Chang-Ki HONG, Kun-Tack LEE, Im-Soo PARK, Dong-Gyun HAN, Mong-Sup LEE, Jung-Min OH
  • Publication number: 20070264793
    Abstract: In a method of manufacturing a semiconductor device such as a SONOS type semiconductor device, a trench is formed on a substrate. An isolation layer protruding from the substrate is formed to fill the trench. After a first layer is formed on the substrate, a preliminary second layer pattern is formed on the first layer. The preliminary second layer pattern has an upper face substantially lower than or substantially equal to an upper face of the isolation layer. A third layer is formed on the preliminary second layer and the isolation layer. A fourth layer is formed on the third layer. The fourth layer, the third layer, the preliminary second layer pattern and the first layer are partially etched to form a gate structure on the substrate. Source/drain regions are formed at portions of the substrate adjacent to the gate structure.
    Type: Application
    Filed: May 10, 2007
    Publication date: November 15, 2007
    Inventors: Jung-Min Oh, Jeong-Nam Han, Chang-Ki Hong, Kun-Tack Lee, Dae-Hyuk Kang, Woo-Gwam Shim, Jong-Won Lee
  • Publication number: 20070254389
    Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a mold for forming a storage electrode, forming sacrificial spacers at side walls of openings in the mold, forming a conductive film for a storage electrode along the inside of the openings, removing the mold by a wet etching process, removing the sacrificial spacers by a dry etching process, and sequentially forming a dielectric film and an upper electrode on the storage electrode.
    Type: Application
    Filed: April 27, 2007
    Publication date: November 1, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-Min OH, Jeong-Nam HAN, Chang-Ki HONG, Kun-Tack LEE, Dae-Hyuk KANG, Sung-Il CHO
  • Publication number: 20070082471
    Abstract: In one aspect, a method of fabricating a semiconductor memory device is provided which includes forming a mold insulating film over first and second portions of a semiconductor substrate, where the mold insulating film includes a plurality of storage node electrode holes spaced apart over the first portion of the semiconductor substrate. The method further includes forming a plurality of storage node electrodes on inner surfaces of the storage node electrode holes, respectively, and forming a capping film which covers the storage node electrodes and a first portion of the mold insulating film located over the first portion of the semiconductor substrate, and which exposes a second portion of the mold insulating film located over the second portion of the semiconductor substrate.
    Type: Application
    Filed: October 12, 2006
    Publication date: April 12, 2007
    Inventors: Dae-hyuk Kang, Jung-min Oh, Chang-ki Hong, Sang-jun Choi, Woo-gwan Shim