Patents by Inventor Dae In Kang

Dae In Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11770271
    Abstract: A data center includes: a server including a control plane; a data plane that is configured to receive network connection information from the control plane; and a storage group including a plurality of first storage devices. The data plane may be configured to set connections between the server and the plurality of first storage devices based on the network connection information corresponding to each first storage device of the plurality of first storage devices.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: September 26, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Suk Kyu Lee, Dae-In Kang, Woong Hee Lee
  • Publication number: 20220060354
    Abstract: A data center includes: a server including a control plane; a data plane that is configured to receive network connection information from the control plane; and a storage group including a plurality of first storage devices. The data plane may be configured to set connections between the server and the plurality of first storage devices based on the network connection information corresponding to each first storage device of the plurality of first storage devices.
    Type: Application
    Filed: May 6, 2021
    Publication date: February 24, 2022
    Inventors: Suk Kyu LEE, Dae-In KANG, Woong Hee LEE
  • Patent number: 7964501
    Abstract: A method of fabricating a semiconductor device includes providing a semiconductor substrate including a first landing plug and a second landing plug. A bit line is formed over the semiconductor substrate. The bit line is electrically coupled to the first landing plug. A stacked structure of an etch stop film and an interlayer insulating film is deposited over the semiconductor substrate including the bit line. The stacked structure is selectively etched using a contact mask to form a contact hole having an upper part that is wider than a lower part of the contact hole. The contact hole exposes the second landing plug. A contact plug is formed over the contact hole. The contact plug is electrically coupled to the second landing plug.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: June 21, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Dae In Kang
  • Publication number: 20090108461
    Abstract: A method of fabricating a semiconductor device includes providing a semiconductor substrate including a first landing plug and a second landing plug. A bit line is formed over the semiconductor substrate. The bit line is electrically coupled to the first landing plug. A stacked structure of an etch stop film and an interlayer insulating film is deposited over the semiconductor substrate including the bit line. The stacked structure is selectively etched using a contact mask to form a contact hole having an upper part that is wider than a lower part of the contact hole. The contact hole exposes the second landing plug. A contact plug is formed over the contact hole. The contact plug is electrically coupled to the second landing plug.
    Type: Application
    Filed: December 31, 2007
    Publication date: April 30, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventor: Dae In KANG