Patents by Inventor Dae-Jin HAM

Dae-Jin HAM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10910224
    Abstract: A method for fabricating a semiconductor device includes: forming a gate trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the gate trench; forming a first work function layer over the gate dielectric layer; doping a work function adjustment element to form a second work function layer which overlaps with the sidewalls of the gate trench; forming a gate conductive layer that partially fills the gate trench; and forming doped regions inside the semiconductor substrate on both sides of the gate trench.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: February 2, 2021
    Assignee: SK hynix Inc.
    Inventors: Tae-Su Jang, Jin-Chul Park, Ji-Hwan Park, Il-Sik Jang, Seong-Wan Ryu, Se-In Kwon, Jung-Ho Shin, Dae-Jin Ham
  • Publication number: 20200411323
    Abstract: A method for fabricating a semiconductor device includes: forming a gate trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the gate trench; forming a first work function layer over the gate dielectric layer; doping a work function adjustment element to form a second work function layer which overlaps with the sidewalls of the gate trench; forming a gate conductive layer that partially fills the gate trench; and forming doped regions inside the semiconductor substrate on both sides of the gate trench.
    Type: Application
    Filed: September 14, 2020
    Publication date: December 31, 2020
    Inventors: Tae-Su JANG, Jin-Chul PARK, Ji-Hwan PARK, Il-Sik JANG, Seong-Wan RYU, Se-In KWON, Jung-Ho SHIN, Dae-Jin HAM
  • Patent number: 10811260
    Abstract: A method for fabricating a semiconductor device includes: forming a gate trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the gate trench; forming a first work function layer over the gate dielectric layer; doping a work function adjustment element to form a second work function layer which overlaps with the sidewalls of the gate trench; forming a gate conductive layer that partially fills the gate trench; and forming doped regions inside the semiconductor substrate on both sides of the gate trench.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: October 20, 2020
    Assignee: SK hynix Inc.
    Inventors: Tae-Su Jang, Jin-Chul Park, Ji-Hwan Park, Il-Sik Jang, Seong-Wan Ryu, Se-In Kwon, Jung-Ho Shin, Dae-Jin Ham
  • Publication number: 20190244820
    Abstract: A method for fabricating a semiconductor device includes: forming a gate trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the gate trench; forming a first work function layer over the gate dielectric layer; doping a work function adjustment element to form a second work function layer which overlaps with the sidewalls of the gate trench; forming a gate conductive layer that partially fills the gate trench; and forming doped regions inside the semiconductor substrate on both sides of the gate trench.
    Type: Application
    Filed: April 12, 2019
    Publication date: August 8, 2019
    Inventors: Tae-Su JANG, Jin-Chul PARK, Ji-Hwan PARK, Il-Sik JANG, Seong-Wan RYU, Se-In KWON, Jung-Ho SHIN, Dae-Jin HAM
  • Patent number: 10304684
    Abstract: A method for fabricating a semiconductor device includes: forming a gate trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the gate trench; forming a first work function layer over the gate dielectric layer; doping a work function adjustment element to form a second work function layer which overlaps with the sidewalls of the gate trench; forming a gate conductive layer that partially fills the gate trench; and forming doped regions inside the semiconductor substrate on both sides of the gate trench.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: May 28, 2019
    Assignee: SK hynix Inc.
    Inventors: Tae-Su Jang, Jin-Chul Park, Ji-Hwan Park, Il-Sik Jang, Seong-Wan Ryu, Se-In Kwon, Jung-Ho Shin, Dae-Jin Ham
  • Publication number: 20180174845
    Abstract: A method for fabricating a semiconductor device includes: forming a gate trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the gate trench; forming a first work function layer over the gate dielectric layer; doping a work function adjustment element to form a second work function layer which overlaps with the sidewalls of the gate trench; forming a gate conductive layer that partially fills the gate trench; and forming doped regions inside the semiconductor substrate on both sides of the gate trench.
    Type: Application
    Filed: September 25, 2017
    Publication date: June 21, 2018
    Inventors: Tae-Su JANG, Jin-Chul PARK, Ji-Hwan PARK, Il-Sik JANG, Seong-Wan RYU, Se-In KWON, Jung-Ho SHIN, Dae-Jin HAM