Patents by Inventor Dae-Jin Hyun

Dae-Jin Hyun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11736088
    Abstract: Devices and processes for preparing devices are described for reducing resonance of spurious waves in a bulk acoustic resonator and/or for obstructing propagation of lateral waves out of an active region of the bulk acoustic resonator. A first electrode is coupled to a first side of a piezoelectric layer and a second electrode is coupled to a second side of the piezoelectric layer to form a stack having the active region. The piezoelectric layer in the active region is configured to resonate in response to an electrical signal applied between the first electrode and the second electrode. One or more perforations in the first electrode, the piezoelectric layer and/or the second electrode, and/or one or more posts or beams supporting the stack, reduce resonance of spurious waves and obstruct propagation of lateral acoustic waves out of the active region.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: August 22, 2023
    Assignee: GLOBAL COMMUNICATION SEMICONDUCTORS, LLC
    Inventors: Robert B. Stokes, Alvin M. Kong, Liping D. Hou, Dae-Jin Hyun, Shing-Kuo Wang
  • Publication number: 20200220520
    Abstract: Devices and processes for preparing devices are described for reducing resonance of spurious waves in a bulk acoustic resonator and/or for obstructing propagation of lateral waves out of an active region of the bulk acoustic resonator. A first electrode is coupled to a first side of a piezoelectric layer and a second electrode is coupled to a second side of the piezoelectric layer to form a stack having the active region. The piezoelectric layer in the active region is configured to resonate in response to an electrical signal applied between the first electrode and the second electrode. One or more perforations in the first electrode, the piezoelectric layer and/or the second electrode, and/or one or more posts or beams supporting the stack, reduce resonance of spurious waves and obstruct propagation of lateral acoustic waves out of the active region.
    Type: Application
    Filed: March 16, 2020
    Publication date: July 9, 2020
    Inventors: Robert B. Stokes, Alvin M. Kong, Liping D. Hou, Dae-Jin Hyun, Shing-Kuo Wang
  • Patent number: 10601391
    Abstract: Devices and processes for preparing devices are described for reducing resonance of spurious waves in a bulk acoustic resonator. A first electrode is coupled to a first side of a piezoelectric layer and a second electrode is coupled to a second side of the piezoelectric layer. The piezoelectric layer is configured to resonate in response to an electrical signal applied between the first electrode and the second electrode. Perforations in the first electrode, the piezoelectric layer and/or the second electrode, and/or posts or beams supporting the second electrode, reduce resonance of spurious waves.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: March 24, 2020
    Assignee: GLOBAL COMMUNICATION SEMICONDUCTORS, LLC.
    Inventors: Robert B. Stokes, Alvin M. Kong, Liping Daniel Hou, Dae-Jin Hyun, Shing-Kuo Wang
  • Publication number: 20180138885
    Abstract: Devices and processes for preparing devices are described for reducing resonance of spurious waves in a bulk acoustic resonator. A first electrode is coupled to a first side of a piezoelectric layer and a second electrode is coupled to a second side of the piezoelectric layer. The piezoelectric layer is configured to resonate in response to an electrical signal applied between the first electrode and the second electrode. Perforations in the first electrode, the piezoelectric layer and/or the second electrode, and/or posts or beams supporting the second electrode, reduce resonance of spurious waves.
    Type: Application
    Filed: October 20, 2017
    Publication date: May 17, 2018
    Inventors: Robert B. Stokes, Alvin M. Kong, Liping Daniel Hou, Dae-Jin Hyun, Shing-Kuo Wang
  • Patent number: 5668062
    Abstract: A method of processing a semiconductor wafer (12) to form micromechanical devices. Extended scribe lines (20) are provided from centrally located integrated circuit scribe lines (16) to provide a saw street that extends to the perimeter of the wafer. Micromechanical devices (14), including those of the DMD type, can be fabricated without a layer of protective oxide while reducing the generation of conductive particles during the wafer saw process which could otherwise degrade the operation of the micromechanical devices having movable elements. The extended scribe lines (20) are fabricated at the same time that the conventional scribe lines (16) are formed about the integrated circuits (14).
    Type: Grant
    Filed: August 23, 1995
    Date of Patent: September 16, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Dae-Jin Hyun, James L. Connor