Patents by Inventor Dae-jin Park
Dae-jin Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8372748Abstract: A method for manufacturing semiconductor device includes forming an interlayer dielectric layer including a contact plug defined therein to electrically couple a semiconductor substrate on which a cell region and a dummy region are defined. A sacrificial layer is formed over the interlayer dielectric layer. An etch stop pattern is formed over the sacrificial layer, the etch stop pattern being vertically aligned to the dummy region. A storage electrode region through the sacrificial layer is defined to expose a first storage electrode contact of the cell region, the second storage electrode contact of the dummy region remaining covered by the sacrificial layer. A conductive layer is deposited within the storage electrode region to form a storage electrode contacting the first storage electrode contact of the cell region.Type: GrantFiled: July 9, 2010Date of Patent: February 12, 2013Assignee: Hynix Semiconductor Inc.Inventors: Dae Jin Park, Jong Won Jang
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Patent number: 8207000Abstract: A manufacturing method of a flat panel display according to an exemplary embodiment of the present invention includes: coating a first adhering member on a first supporting plate; disposing a first substrate on the first adhering member; using ultrasonic waves to adhere the first supporting plate and the first substrate; and forming a gate line, a data line, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor on the first substrate. According to the manufacturing method of the flat panel display according to an exemplary embodiment of the present invention, the first adhering member made of the plurality of adhering particles is melted by using the ultrasonic waves without an additional adhering film to adhere the flexible first substrate and the first supporting plate, thereby reducing the overall manufacturing cost.Type: GrantFiled: July 6, 2010Date of Patent: June 26, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Myung-Hwan Kim, Dae-Jin Park, Jung-Hun Noh
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Patent number: 8076171Abstract: A mold for a display device, comprises a supporting frame; the supporting frame comprising at least one depressed pattern forming part on a first side of the supporting frame, and an organic layer removing part which is formed on a circumference of the pattern forming part, the pattern forming part depressed regions of different depths, the mold having light-blocking and light-transmitting portions corresponding to certain of the depressed pattern forming parts.Type: GrantFiled: February 21, 2007Date of Patent: December 13, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Dae-jin Park, Hyung-il Jeon
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Publication number: 20110266956Abstract: A display apparatus includes a substrate; a first insulating layer formed on the substrate and having an upper surface including a concavo-convex area including one or more concave features and one or more convex features; a first storage electrode overlaying the upper surface and a side surface of the first insulating layer and having an upper surface including a concavo-convex area including one or more concave features and one or more convex features, each concave feature of the first storage electrode overlying at least one respective concave feature of the first insulating layer, each convex feature of the first storage electrode overlying at least one respective convex feature of the first insulating layer; a second insulating layer formed on the first storage electrode; and a second storage electrode formed on the second insulating layer which separates the second storage electrode from the underlying first storage electrode.Type: ApplicationFiled: July 12, 2011Publication date: November 3, 2011Inventors: Dae-Jin PARK, Kyu-Young Kim, Hyung-Il Jeon, Ju-Han Bae
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Patent number: 8048592Abstract: A photomask that includes an assistant pattern is provided. The photomask comprises a target pattern transcribed over a wafer by an exposing process, and an assistant pattern formed symmetrically with a main pattern of the target pattern based on the outer pattern of the target pattern, thereby minimizing the loss of the outer pattern and maximizing the process margin in the defocus environment.Type: GrantFiled: June 29, 2009Date of Patent: November 1, 2011Assignee: Hynix Semiconductor Inc.Inventor: Dae Jin Park
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Publication number: 20110227080Abstract: A flat panel display includes; a first substrate, a white reflective layer disposed on the first substrate, a pixel electrode disposed on the white reflective, a second substrate disposed facing the first substrate, a common electrode disposed on the second substrate, and an electrooptic layer disposed between the pixel electrode and the common electrode, wherein the white reflective layer includes at least one of TiO2 and BaSO4.Type: ApplicationFiled: March 2, 2011Publication date: September 22, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Nam-Seok ROH, Jung-Woo PARK, Dae-Jin PARK, Yu-Jin KIM, Joo-Han BAE, Tae-Hyung HWANG, Seok-Joon HONG
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Patent number: 8018712Abstract: A bus-bar for assembling a capacitor device is disclosed, which is capable of improving the environment of a soldering operation for the bus-bar being soldered to a capacitor device, reducing the inferior rate of the capacitor device while improving the quality of the capacitor device, and reducing the weight of the capacitor module, in soldering the bus-bar to capacitor devices. The lead frame attached to polar plates by soldering is formed thinner than the other parts of the bus-bar, and opening parts having an oval or polygonal shape are formed on a surface of the bus-bar so that two adjoining capacitor devices can be exposed. The lead frame is formed in the opening in order for soldering with the polar plates of the capacitor device.Type: GrantFiled: September 26, 2008Date of Patent: September 13, 2011Assignee: Nuintek Co., Ltd.Inventors: Chang Hoon Yang, Dae Jin Park, Yong Won Jun
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Publication number: 20110217842Abstract: A method for manufacturing semiconductor device includes forming an interlayer dielectric layer including a contact plug defined therein to electrically couple a semiconductor substrate on which a cell region and a dummy region are defined. A sacrificial layer is formed over the interlayer dielectric layer. An etch stop pattern is formed over the sacrificial layer, the etch stop pattern being vertically aligned to the dummy region. A storage electrode region through the sacrificial layer is defined to expose a first storage electrode contact of the cell region, the second storage electrode contact of the dummy region remaining covered by the sacrificial layer. A conductive layer is deposited within the storage electrode region to form a storage electrode contacting the first storage electrode contact of the cell region.Type: ApplicationFiled: July 9, 2010Publication date: September 8, 2011Applicant: Hynix Semiconductor Inc.Inventors: Dae Jin PARK, Jong Won Jang
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Patent number: 8012845Abstract: In an insulating film pattern, a first pattern part is formed at one surface of the insulating film pattern to form a source electrode, a drain electrode, and a semiconductor layer of the thin film transistor. The first pattern part is recessed in one surface of the insulating film pattern. The insulating film pattern is formed on a substrate through an imprint scheme, and is deposited on a base substrate having a gate electrode and a gate line through a contact print scheme. A source electrode, drain electrode, and semiconductor layer of a thin film transistor are formed through an inkjet print scheme using a first pattern part of the insulating film pattern. A gate electrode and gate line may be formed using a second pattern part of the insulating film pattern.Type: GrantFiled: April 14, 2009Date of Patent: September 6, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Dae-Jin Park, Kyu-Young Kim
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Patent number: 7999260Abstract: In a display substrate and a method of the display substrate, a bank pattern provided with openings formed therethrough is formed by an imprint method, and the openings are filled with a conductive material by an inkjet method to form a data line and a pixel electrode, in accordance with one or more embodiments. When the display substrate is manufactured, a patterning process by a photolithography method may be replaced with the patterning process by the imprint method and the inkjet method, which simplifies a manufacturing method of the display substrate. In case that the display substrate includes a plastic substrate, the plastic substrate may be prevented from being deformed during a photolithography process.Type: GrantFiled: April 8, 2009Date of Patent: August 16, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Dae-Jin Park, Kyu-Young Kim, Hyung-Il Jeon, Ju-Han Bae
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Patent number: 7989813Abstract: A display apparatus includes a substrate; a first insulating layer formed on the substrate and having an upper surface including a concavo-convex area including one or more concave features and one or more convex features; a first storage electrode overlaying the upper surface and a side surface of the first insulating layer and having an upper surface including a concavo-convex area including one or more concave features and one or more convex features, each concave feature of the first storage electrode overlying at least one respective concave feature of the first insulating layer, each convex feature of the first storage electrode overlying at least one respective convex feature of the first insulating layer; a second insulating layer formed on the first storage electrode; and a second storage electrode formed on the second insulating layer which separates the second storage electrode from the underlying first storage electrode.Type: GrantFiled: June 23, 2008Date of Patent: August 2, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Dae-Jin Park, Kyu-Young Kim, Hyung-Il Jeon, Ju-Han Bae
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Publication number: 20110181998Abstract: There is provided a deposited film for a film capacitor, which comprises: a thermally sprayed metal contact part formed at one end of a dielectric in a width direction of the dielectric, and a margin part having no deposited metal formed at the other end of the dielectric in the width direction of the dielectric; a split electrode in a rectangular shape formed by forming a T-shaped window margin, from the margin part to a predetermined position within a width range of the deposit film, in the width direction of the deposited film; and a fuse part formed between the split electrodes in the width direction of the deposited film, wherein adjacent fuse parts in the length direction of the deposited film are formed in a stepped layout in the width direction of the deposited film.Type: ApplicationFiled: March 15, 2010Publication date: July 28, 2011Applicant: NUINTEK CO., LTD.Inventors: Chang-Hoon YANG, Dae-Jin PARK, Yong-Won JUN
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Publication number: 20110147747Abstract: A display device includes a flexible panel and a cover member. The flexible panel includes a first substrate and a second substrate. The first substrate includes a first support layer in which an organic insulation layer and an inorganic insulation layer are stacked thereon, and a thin-film transistor and a pixel electrode disposed on the first support layer. The second substrate is opposite to the first substrate. The second substrate includes an organic insulation layer and a second support layer on which the inorganic insulation layer is deposited. The cover member covers an outer surface of the flexible panel. Thus, a display device is manufactured by using a support layer on which an organic insulation layer and an inorganic insulation layer are coated as a base substrate, so that defects generated in a manufacturing process may be prevented.Type: ApplicationFiled: October 19, 2010Publication date: June 23, 2011Inventors: Hyung-Il Jeon, Dae-Jin Park, Tae-Hyung Hwang
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Publication number: 20110149472Abstract: There is provided a method of connecting busbars for a capacitor and a product manufactured by the same method, whereby the inductance of the capacitor is decreased and thus the amount of heat generated in the capacitor is decreased to improve the temperature characteristics and electrical characteristics of the capacitor and the reliability of the quality of the capacitor, to consistently improve the insulation between the busbars having different polarity, and to maintain the insulation between the busbars in severe environments. The method of connecting busbars for a capacitor is characterized by coating at least parts of an N-pole busbar and a P-pole busbar, each of which has different polarity, with an insulating material; exposing parts of the N-pole and P-pole busbars outside an outer case so as to form a terminal to be connected to an other component; and connecting the N-pole busbar to the P-pole busbar in a manner that at least parts of the N-pole and P-pole is busbars overlap each other.Type: ApplicationFiled: December 21, 2009Publication date: June 23, 2011Applicant: NUINTEK CO., LTD.Inventors: Chang-Hoon YANG, Dae-Jin Park, Yong-Won Jun
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Patent number: 7933111Abstract: A metallized plastic film is formed by winding two sheets of film vapor-deposited with an electrode metal as one group and a film capacitor, comprising; three individual splittings of electrode metal by predetermined width and length and then adjoining of splitting parts. Accordingly, self-heating of the film capacitor can be restrained and a capacitance reduction rate caused by the operation of the fuse parts can be reduced.Type: GrantFiled: May 7, 2008Date of Patent: April 26, 2011Assignee: Nuinteck Co., LtdInventors: Chang Hoon Yang, Dae Jin Park, Yong Won Jun
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Publication number: 20110092004Abstract: A manufacturing method of a flat panel display according to an exemplary embodiment of the present invention includes: coating a first adhering member on a first supporting plate; disposing a first substrate on the first adhering member; using ultrasonic waves to adhere the first supporting plate and the first substrate; and forming a gate line, a data line, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor on the first substrate. According to the manufacturing method of the flat panel display according to an exemplary embodiment of the present invention, the first adhering member made of the plurality of adhering particles is melted by using the ultrasonic waves without an additional adhering film to adhere the flexible first substrate and the first supporting plate, thereby reducing the overall manufacturing cost.Type: ApplicationFiled: July 6, 2010Publication date: April 21, 2011Inventors: Myung-Hwan KIM, Dae-Jin Park, Jung-Hun Noh
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Patent number: 7927961Abstract: A disclosed selective etching method comprises mixing a polymer with carbon nanotubes, applying the mixture to an etching target layer to form a carbon nanotube-polymer composite layer, forming a hard mask by patterning the carbon nanotube-polymer composite layer, such that a part of the etching target layer is selectively exposed, and selectively etching the etching target layer exposed through the hard mask. The polymer preferably includes a photoresist. Also disclosed is a method for forming an isolation structure of a memory device using the selective etching method.Type: GrantFiled: February 12, 2010Date of Patent: April 19, 2011Assignee: Hynix Semiconductor Inc.Inventor: Dae Jin Park
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Patent number: 7891087Abstract: Disclosed are a method for connecting a bus bar of a capacitor, improving temperature characteristics and reliability of the capacitor by reducing inductance and impedance such that heat generation is restrained during use of the capacitor, and a product fabricated by the same. A pair of bus bars are insulatedly connected to sprayed surfaces on both sides of a plurality of capacitor devices, in such a manner that lead frames arranged alternately on a first bus bar are connected in contact with the sprayed surfaces facing in a diagonal direction, of neighboring capacitor devices. Other lead frames arranged alternately on a second bus bar are connected to the sprayed surfaces facing in another diagonal direction across the above diagonal direction in an X-shape. Then, the pair of bus bars are assembled to be insulated from each other and overlapped at one side of the capacitor device.Type: GrantFiled: June 5, 2009Date of Patent: February 22, 2011Assignee: Nuintek Co., Ltd.Inventors: Chang Hoon Yang, Dae Jin Park, Yong Won Jun, Chang Geun Park, Yun Rak Kim
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Patent number: 7894027Abstract: A thin film transistor display substrate comprises a base substrate on which a pixel area including a first reflection area and a second reflection area is defined. A gate line formed on the base substrate and a data line formed on the base substrate. The data line is insulated from and intersected with the gate line to define the pixel area. A thin film transistor is formed in the pixel area and connected to the gate line and the data line. A first reflection layer is formed on the base substrate and corresponds to the first reflection area. A color filter is formed on the first reflection layer and corresponds to the pixel area. A second reflection layer is formed on the color filter and corresponds to the second reflection area. A pixel electrode is formed on the color filter and is electrically connected to the thin film transistor.Type: GrantFiled: November 18, 2008Date of Patent: February 22, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Dae-Jin Park, Jang-Kyum Kim, Ju-Han Bae
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Patent number: 7875477Abstract: A method of manufacturing a liquid crystal display at a reduced cost is presented. The method entails: preparing an insulating substrate; forming a gate line and a data line on the insulating substrate to define a pixel area; forming a thin film transistor at an intersection of the gate line and the data line; forming A passivation layer on the thin film transistor; positioning a mold having a concavo-convex pattern on the organic passivation layer, pressing the mold, and forming the concavo-convex pattern on the surface of the organic passivation layer. A pixel electrode on the organic passivation layer is formed.Type: GrantFiled: July 19, 2006Date of Patent: January 25, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-hyuk Chang, Nam-seok Roh, Mun-pyo Hong, Dae-jin Park