Patents by Inventor Dae-Keun Kang

Dae-Keun Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140299889
    Abstract: A semiconductor device includes a first gate structure on a first region of a substrate and a second gate structure on a second region of the substrate, a first impurity region on an upper portion of the substrate adjacent to the first gate structure and a second impurity region on an upper portion of the substrate adjacent to the second gate structure, a first metal silicide layer on the first impurity region, a Fermi level pinning layer on the second impurity region, a second metal silicide layer on the Fermi level pinning layer, and a first contact plug on the first metal silicide layer and a second contact plug on the second metal silicide layer. The Fermi level pinning layer pins a Fermi level of the second metal silicide layer to a given energy level.
    Type: Application
    Filed: April 8, 2014
    Publication date: October 9, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Choong-Rae CHO, Dae-Keun KANG, Eun-Sung KIM, Chul-Ho SHIN, Han-Geun YU
  • Publication number: 20120289019
    Abstract: In a method of forming a pattern, a plurality of first line patterns and first spacers filling spaces between the adjacent first line patterns are formed on an object layer. The first line patterns and the first spacers extend in a first direction. A plurality of second line patterns are formed on the first line patterns and the first spacers. The second line patterns extend in a second direction substantially perpendicular to the first direction. The first spacers are partially removed by a wet etching process. The object layer is etched using the first and second line patterns as an etching mask.
    Type: Application
    Filed: May 9, 2012
    Publication date: November 15, 2012
    Inventors: Dong-Hyun Im, Byoung-Jae Bae, Young-Jae Kim, Dae-Keun Kang
  • Patent number: 7582539
    Abstract: The present invention provides methods of cleaning a semiconductor device by removing contaminants, such as particles and/or etching by-products, from a structure of a semiconductor device using a first cleaning solution including a mixture of ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2) and deionized (DI) water, and a second cleaning solution including ozone (O3) water. The present invention also provides methods of manufacturing a semiconductor device using these methods of cleaning the semiconductor device.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: September 1, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keum-Joo Lee, Jin-Hye Bae, Dae-Keun Kang
  • Patent number: 7531414
    Abstract: A method according to some embodiments of the invention includes defining an active region by forming a trench device isolation region on an integrated substrate, forming a mask pattern that exposes a channel sub-region of the active region and the trench device isolation region adjacent to the channel sub-region, etching the trench device isolation region, which is exposed by the mask pattern, to be recessed to a first depth using the mask pattern as an etch mask, etching the channel sub-region to form a gate trench having a second depth that is deeper than the first depth using the mask pattern as an etch mask, and forming a recess gate that fills the gate trench.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: May 12, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Chul Park, Jun Seo, Tae-Hyuk Ahn, Hyuk-Jin Kwon, Jong-Heui Song, Dae-Keun Kang
  • Patent number: 7527921
    Abstract: Example embodiments of the present invention relate to methods of treating and removing a photoresist pattern and a method of manufacturing a semiconductor device using the same. Other example embodiments of the present invention relate to a method of treating a photoresist pattern and a method of removing a photoresist pattern formed using a photoresist composition suitable for argon fluoride (ArF). In a method of removing a photoresist pattern, an ozone vapor including a water vapor and an ozone gas may be provided onto the photoresist pattern to remove a hydrophobic group from a photoresist resin included in the photoresist pattern. A cleaning solution may be provided to make the photoresist pattern water-soluble. A cleaning process may be performed on the photoresist pattern to remove the photoresist pattern. The photoresist pattern may be effectively removed without an increased processing time and/or damage to a substrate.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: May 5, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Hyuk Chung, Dae-Keun Kang, Se-Ho Cha
  • Publication number: 20080124909
    Abstract: The present invention provides methods of cleaning a semiconductor device by removing contaminants, such as particles and/or etching by-products, from a structure of a semiconductor device using a first cleaning solution including a mixture of ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2) and deionized (DI) water, and a second cleaning solution including ozone (O3) water. The present invention also provides methods of manufacturing a semiconductor device using these methods of cleaning the semiconductor device.
    Type: Application
    Filed: November 9, 2007
    Publication date: May 29, 2008
    Inventors: Keum-Joo Lee, Jin-Hye Bae, Dae-Keun Kang
  • Publication number: 20080090356
    Abstract: A method according to some embodiments of the invention includes defining an active region by forming a trench device isolation region on an integrated substrate, forming a mask pattern that exposes a channel sub-region of the active region and the trench device isolation region adjacent to the channel sub-region, etching the trench device isolation region, which is exposed by the mask pattern, to be recessed to a first depth using the mask pattern as an etch mask, etching the channel sub-region to form a gate trench having a second depth that is deeper than the first depth using the mask pattern as an etch mask, and forming a recess gate that fills the gate trench.
    Type: Application
    Filed: December 13, 2007
    Publication date: April 17, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-Chul PARK, Jun SEO, Tae-Hyuk AHN, Hyuk-Jin KWON, Jong-Heui SONG, Dae-Keun KANG
  • Patent number: 7326619
    Abstract: A method according to some embodiments of the invention includes defining an active region by forming a trench device isolation region on an integrated substrate, forming a mask pattern that exposes a channel sub-region of the active region and the trench device isolation region adjacent to the channel sub-region, etching the trench device isolation region, which is exposed by the mask pattern, to be recessed to a first depth using the mask pattern as an etch mask, etching the channel sub-region to form a gate trench having a second depth that is deeper than the first depth using the mask pattern as an etch mask, and forming a recess gate that fills the gate trench.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: February 5, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Chul Park, Jun Seo, Tae-Hyuk Ahn, Hyuk-Jin Kwon, Jong-Heui Song, Dae-Keun Kang
  • Publication number: 20060292491
    Abstract: Example embodiments of the present invention relate to methods of treating and removing a photoresist pattern and a method of manufacturing a semiconductor device using the same. Other example embodiments of the present invention relate to a method of treating a photoresist pattern and a method of removing a photoresist pattern formed using a photoresist composition suitable for argon fluoride (ArF). In a method of removing a photoresist pattern, an ozone vapor including a water vapor and an ozone gas may be provided onto the photoresist pattern to remove a hydrophobic group from a photoresist resin included in the photoresist pattern. A cleaning solution may be provided to make the photoresist pattern water-soluble. A cleaning process may be performed on the photoresist pattern to remove the photoresist pattern. The photoresist pattern may be effectively removed without an increased processing time and/or damage to a substrate.
    Type: Application
    Filed: June 27, 2006
    Publication date: December 28, 2006
    Inventors: Dae-Hyuk Chung, Dae-Keun Kang, Se-Ho Cha
  • Publication number: 20060270241
    Abstract: In a method of removing a photoresist pattern from a substrate without deteriorating a lower electrode or increasing processing time, ozone gas may be provided onto a substrate on which a photoresist pattern may be formed. An oxidation-decomposition process may be carried out using the ozone gas, to thereby decompose the photoresist pattern on the substrate. The decomposed photoresist pattern may be dissolved into water and removed from the substrate in a rinsing process. Accordingly, a photoresist pattern in an opening having a relatively high aspect ratio may be sufficiently removed from a substrate without deteriorating the lower electrode or increasing processing time.
    Type: Application
    Filed: May 30, 2006
    Publication date: November 30, 2006
    Inventors: Kyoung-Chul Kim, Dae-Keun Kang, Se-Ho Cha, In-Seak Hwang, Keum-Joo Lee
  • Publication number: 20050042833
    Abstract: A method according to some embodiments of the invention includes defining an active region by forming a trench device isolation region on an integrated substrate, forming a mask pattern that exposes a channel sub-region of the active region and the trench device isolation region adjacent to the channel sub-region, etching the trench device isolation region, which is exposed by the mask pattern, to be recessed to a first depth using the mask pattern as an etch mask, etching the channel sub-region to form a gate trench having a second depth that is deeper than the first depth using the mask pattern as an etch mask, and forming a recess gate that fills the gate trench.
    Type: Application
    Filed: July 28, 2004
    Publication date: February 24, 2005
    Inventors: Jong-Chul Park, Jun Seo, Tae-Hyuk Ahn, Hyuk-Jin Kwon, Jong-Heui Song, Dae-Keun Kang
  • Patent number: 6831012
    Abstract: After a silicidation blocking pattern is formed on a substrate including silicon, the silicidation blocking pattern is hardened by a thermal annealing process. The substrate is rinsed to remove a native oxide film formed on the substrate, and then a silicide film is formed on a portion of the substrate exposed by the silicidation blocking pattern. The silicide film can thus be formed in an exact portion of the substrate, and the substrate is not damaged during rinsing.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: December 14, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Keun Kang, Yong-Sun Ko, In-Seak Hwang, Byoung-Moon Yoon
  • Publication number: 20040029378
    Abstract: After a silicidation blocking pattern is formed on a substrate including silicon, the silicidation blocking pattern is hardened by a thermal annealing process. The substrate is rinsed to remove a native oxide film formed on the substrate, and then a silicide film is formed on a portion of the substrate exposed by the silicidation blocking pattern. The silicide film can thus be formed in an exact portion of the substrate, and the substrate is not damaged during rinsing.
    Type: Application
    Filed: May 28, 2003
    Publication date: February 12, 2004
    Inventors: Dae-Keun Kang, Yong-Sun Ko, In-Seak Hwang, Byoung-Moon Yoon