Patents by Inventor Dae-Kwon Joo

Dae-Kwon Joo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9023718
    Abstract: A method of fabricating a semiconductor device includes: forming an epitaxial layer on a semiconductor substrate; forming a capping layer having a first thickness on the epitaxial layer; and oxidizing the capping layer in an oxygen atmosphere to form a first gate dielectric layer having a second thickness.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: May 5, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ho Do, Ha-Jin Lim, Weon-Hong Kim, Hoi-Sung Chung, Moon-Kyun Song, Dae-Kwon Joo
  • Patent number: 8963227
    Abstract: Methods of manufacturing a semiconductor device include forming a gate insulation layer including a high-k dielectric material on a substrate that is divided into a first region and a second region; forming a diffusion barrier layer including a first metal on a second portion of the gate insulation layer in the second region; forming a diffusion layer on the gate insulation layer and the diffusion barrier layer; and diffusing an element of the diffusion layer into a first portion of the gate insulation layer in the first region.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: February 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-Jin Lim, Jin-Ho Do, Weon-Hong Kim, Moon-Kyun Song, Dae-Kwon Joo
  • Patent number: 8912611
    Abstract: A method of fabricating a semiconductor device includes forming a lower interfacial layer on a semiconductor layer, the lower interfacial layer being a nitride layer, forming an intermediate interfacial layer on the lower interfacial layer, the intermediate interfacial layer being an oxide layer, and forming a high-k dielectric layer on the intermediate interfacial layer. The high-k dielectric layer has a dielectric constant that is higher than dielectric constants of the lower interfacial layer and the intermediate interfacial layer.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: December 16, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: WeonHong Kim, Dae-Kwon Joo, Hajin Lim, Jinho Do, Kyungil Hong, Moonkyun Song
  • Publication number: 20140175569
    Abstract: A method of fabricating a semiconductor device includes forming a lower interfacial layer on a semiconductor layer, the lower interfacial layer being a nitride layer, forming an intermediate interfacial layer on the lower interfacial layer, the intermediate interfacial layer being an oxide layer, and forming a high-k dielectric layer on the intermediate interfacial layer. The high-k dielectric layer has a dielectric constant that is higher than dielectric constants of the lower interfacial layer and the intermediate interfacial layer.
    Type: Application
    Filed: February 26, 2014
    Publication date: June 26, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: WeonHong KIM, Dae-Kwon JOO, Hajin LIM, Jinho DO, Kyungil HONG, Moonkyun SONG
  • Publication number: 20140141599
    Abstract: A method of fabricating a semiconductor device includes: forming an epitaxial layer on a semiconductor substrate; forming a capping layer having a first thickness on the epitaxial layer; and oxidizing the capping layer in an oxygen atmosphere to form a first gate dielectric layer having a second thickness.
    Type: Application
    Filed: January 28, 2014
    Publication date: May 22, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ho Do, Ha-Jin Lim, Weon-Hong Kim, Hoi-Sung Chung, Moon-Kyun Song, Dae-Kwon Joo
  • Publication number: 20140124872
    Abstract: A method of fabricating a semiconductor device includes providing a semiconductor substrate having a first region and a second region, forming a nitrogen-containing lower gate insulating layer on the semiconductor substrate, forming an upper gate insulating layer on the nitrogen containing lower gate insulating layer, forming a lower metal layer on the upper gate insulating layer; and selectively removing the lower metal layer in the first region such that a lower metal layer pattern remains in the second region, wherein the upper gate insulating layer in the first region prevents the lower gate insulating layer in the first region from being etched during removing of the lower metal layer in the first region. A semiconductor device fabricated by the method is also provided.
    Type: Application
    Filed: January 10, 2014
    Publication date: May 8, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: WeonHong KIM, Dae-Kwon JOO
  • Patent number: 8673711
    Abstract: A method of fabricating a semiconductor device includes forming a lower interfacial layer on a semiconductor layer, the lower interfacial layer being a nitride layer, forming an intermediate interfacial layer on the lower interfacial layer, the intermediate interfacial layer being an oxide layer, and forming a high-k dielectric layer on the intermediate interfacial layer. The high-k dielectric layer has a dielectric constant that is higher than dielectric constants of the lower interfacial layer and the intermediate interfacial layer.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: March 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: WeonHong Kim, Dae-Kwon Joo, Hajin Lim, Jinho Do, Kyungil Hong, Moonkyun Song
  • Patent number: 8673747
    Abstract: A method of fabricating a semiconductor device includes: forming an epitaxial layer on a semiconductor substrate; forming a capping layer having a first thickness on the epitaxial layer; and oxidizing the capping layer in an oxygen atmosphere to form a first gate dielectric layer having a second thickness.
    Type: Grant
    Filed: April 25, 2011
    Date of Patent: March 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ho Do, Ha-Jin Lim, Weon-Hong Kim, Hoi-Sung Chung, Moon-Kyun Song, Dae-Kwon Joo
  • Patent number: 8664111
    Abstract: There is provided a method of manufacturing a semiconductor device. In the method, a gate insulation layer including a high-k dielectric material is formed on a substrate. An etch stop layer is formed on the gate insulation layer. A metal layer is formed on the etch stop layer. A hard mask including amorphous silicon is formed on the metal layer. The metal layer is patterned using the hard mask as an etching mask to form a metal layer pattern.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: March 4, 2014
    Assignee: Samsung Electronic Co., Ltd.
    Inventors: Ha-Jin Lim, Moon-Han Park, Eun-Gon Kim, Jin-Ho Do, Weon-Hong Kim, Moon-Kyun Song, Dae-Kwon Joo
  • Patent number: 8652908
    Abstract: A method of fabricating a semiconductor device includes providing a semiconductor substrate having a first region and a second region, forming a nitrogen-containing lower gate insulating layer on the semiconductor substrate, forming an upper gate insulating layer on the nitrogen containing lower gate insulating layer, forming a lower metal layer on the upper gate insulating layer; and selectively removing the lower metal layer in the first region such that a lower metal layer pattern remains in the second region, wherein the upper gate insulating layer in the first region prevents the lower gate insulating layer in the first region from being etched during removing of the lower metal layer in the first region. A semiconductor device fabricated by the method is also provided.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: February 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: WeonHong Kim, Dae-Kwon Joo
  • Publication number: 20140035050
    Abstract: Methods of manufacturing a semiconductor device include forming a gate insulation layer including a high-k dielectric material on a substrate that is divided into a first region and a second region; forming a diffusion barrier layer including a first metal on a second portion of the gate insulation layer in the second region; forming a diffusion layer on the gate insulation layer and the diffusion barrier layer; and diffusing an element of the diffusion layer into a first portion of the gate insulation layer in the first region.
    Type: Application
    Filed: October 9, 2013
    Publication date: February 6, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ha-Jin LIM, Jin-Ho Do, Weon-Hong Kim, Moon-Kyun Song, Dae-Kwon Joo
  • Patent number: 8575705
    Abstract: A semiconductor device, including a device isolation layer arranged on a predetermined region of a semiconductor substrate to define an active region, the active region including a central top surface of a (100) crystal plane and an inclined edge surface extending from the central top surface to the device isolation layer, a semiconductor pattern covering the central top surface and the inclined edge surface of the active region, the semiconductor pattern including a flat top surface of a (100) crystal plane that is parallel with the central top surface of the active region and a sidewall that is substantially perpendicular to the flat top surface, and a gate pattern overlapping the semiconductor pattern.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: November 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hajin Lim, Myungsun Kim, Hoi Sung Chung, Jinho Do, Weonhong Kim, Moonkyun Song, Dae-Kwon Joo
  • Patent number: 8563411
    Abstract: Methods of manufacturing a semiconductor device include forming a gate insulation layer including a high-k dielectric material on a substrate that is divided into a first region and a second region; forming a diffusion barrier layer including a first metal on a second portion of the gate insulation layer in the second region; forming a diffusion layer on the gate insulation layer and the diffusion barrier layer; and diffusing an element of the diffusion layer into a first portion of the gate insulation layer in the first region.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: October 22, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-Jin Lim, Jin-Ho Do, Weon-Hong Kim, Moon-Kyun Song, Dae-Kwon Joo
  • Patent number: 8455345
    Abstract: A method of forming agate structure having an improved electric characteristic is disclosed. A gate insulating layer is formed on a substrate and a metal layer is formed on the gate insulating layer. Then, an amorphous silicon layer is formed on the metal layer by a physical vapor deposition (PVD) process. An impurity doped polysilicon layer is formed on the amorphous silicon layer. Formation of an oxide layer at an interface between the amorphous silicon layer and the metal layer may be prevented.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: June 4, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-Jin Lim, Moon-Han Park, Min-Woo Song, Jin-Ho Do, Weon-Hong Kim, Moon-Kyun Song, Dae-Kwon Joo
  • Publication number: 20120129330
    Abstract: A method of fabricating a semiconductor device includes providing a semiconductor substrate having a first region and a second region, forming a nitrogen-containing lower gate insulating layer on the semiconductor substrate, forming an upper gate insulating layer on the nitrogen containing lower gate insulating layer, forming a lower metal layer on the upper gate insulating layer; and selectively removing the lower metal layer in the first region such that a lower metal layer pattern remains in the second region, wherein the upper gate insulating layer in the first region prevents the lower gate insulating layer in the first region from being etched during removing of the lower metal layer in the first region. A semiconductor device fabricated by the method is also provided.
    Type: Application
    Filed: September 22, 2011
    Publication date: May 24, 2012
    Inventors: WeonHong KIM, Dae-Kwon Joo
  • Publication number: 20120129310
    Abstract: A method of fabricating a semiconductor device includes forming a lower interfacial layer on a semiconductor layer, the lower interfacial layer being a nitride layer, forming an intermediate interfacial layer on the lower interfacial layer, the intermediate interfacial layer being an oxide layer, and forming a high-k dielectric layer on the intermediate interfacial layer. The high-k dielectric layer has a dielectric constant that is higher than dielectric constants of the lower interfacial layer and the intermediate interfacial layer.
    Type: Application
    Filed: September 22, 2011
    Publication date: May 24, 2012
    Inventors: WeonHong KIM, Dae-Kwon Joo, Hajin Lim, Jinho Do, Kyungil Hong, Moonkyun Song
  • Publication number: 20120083111
    Abstract: There is provided a method of manufacturing a semiconductor device. In the method, a gate insulation layer including a high-k dielectric material is formed on a substrate. An etch stop layer is formed on the gate insulation layer. A metal layer is formed on the etch stop layer. A hard mask including amorphous silicon is formed on the metal layer. The metal layer is patterned using the hard mask as an etching mask to form a metal layer pattern.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 5, 2012
    Inventors: Ha-Jin Lim, Moon-Han Park, Eun-Gon Kim, Jin-Ho Do, Weon-Hong Kim, Moon-Kyun Song, Dae-Kwon Joo
  • Publication number: 20120070975
    Abstract: A method of forming agate structure having an improved electric characteristic is disclosed. A gate insulating layer is formed on a substrate and a metal layer is formed on the gate insulating layer. Then, an amorphous silicon layer is formed on the metal layer by a physical vapor deposition (PVD) process. An impurity doped polysilicon layer is formed on the amorphous silicon layer. Formation of an oxide layer at an interface between the amorphous silicon layer and the metal layer may be prevented.
    Type: Application
    Filed: September 8, 2011
    Publication date: March 22, 2012
    Inventors: Ha-Jin Lim, Moon-Han Park, Min-Woo Song, Jin-Ho Do, Weon-Hong Kim, Moon-Kyun Song, Dae-Kwon Joo
  • Publication number: 20120032332
    Abstract: Methods of manufacturing a semiconductor device include forming a gate insulation layer including a high-k dielectric material on a substrate that is divided into a first region and a second region; forming a diffusion barrier layer including a first metal on a second portion of the gate insulation layer in the second region; forming a diffusion layer on the gate insulation layer and the diffusion barrier layer; and diffusing an element of the diffusion layer into a first portion of the gate insulation layer in the first region.
    Type: Application
    Filed: July 27, 2011
    Publication date: February 9, 2012
    Inventors: Ha Jin Lim, Jin-Ho Do, Weon-Hong Kim, Moon-Kyun Song, Dae-Kwon Joo
  • Publication number: 20110306184
    Abstract: A method of fabricating a semiconductor device includes: forming an epitaxial layer on a semiconductor substrate; forming a capping layer having a first thickness on the epitaxial layer; and oxidizing the capping layer in an oxygen atmosphere to form a first gate dielectric layer having a second thickness.
    Type: Application
    Filed: April 25, 2011
    Publication date: December 15, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Ho Do, Ha-Jin Lim, Weon-Hong Kim, Hoi-Sung Chung, Moon-Kyun Song, Dae-Kwon Joo