Abstract: The present invention relates to a direct memory access controller, specifically to a direct memory access controller which controls the direct memory access between internal modules and high speed external memories such as SDRAM(Synchronous Dynamic RAM) in high speed digital signal processors having burst transmission feature. The direct memory access controller comprises a plurality of direct memory access controller circuits, a direct memory access bus arbiter, and a direct memory access bus bridge connecting a direct memory access master bus and a direct memory access slave bus and providing a data transmission path between external high speed memories and input/output devices according to a signal from the direct memory access controller which is connected to said master bus.