Patents by Inventor Dae-Sang Chan

Dae-Sang Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10410990
    Abstract: A jig for bonding a semiconductor chip may include a pressurizing portion and at least one opening. The pressuring portion may be configured to pressurize an upper surface of the semiconductor chip bonded to a package substrate via a bump and a flux using a laser. The opening may be surrounded by the pressurizing portion. The laser irradiated to the bump and the flux may be transmitted through the opening. A vapor generated from the flux by the laser may be discharged through the opening. Thus, the contamination of the jig caused by the vapor may be prevented so that a transmissivity of the laser through the jig may be maintained.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: September 10, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Man-Hee Han, Dae-Sang Chan, Sung-Il Cho, Jung-Lae Jung
  • Publication number: 20190103376
    Abstract: A jig for bonding a semiconductor chip may include a pressurizing portion and at least one opening. The pressuring portion may be configured to pressurize an upper surface of the semiconductor chip bonded to a package substrate via a bump and a flux using a laser. The opening may be surrounded by the pressurizing portion. The laser irradiated to the bump and the flux may be transmitted through the opening. A vapor generated from the flux by the laser may be discharged through the opening. Thus, the contamination of the jig caused by the vapor may be prevented so that a transmissivity of the laser through the jig may be maintained.
    Type: Application
    Filed: March 28, 2018
    Publication date: April 4, 2019
    Inventors: Man-Hee Han, Dae-Sang Chan, Sung-il Cho, Jung-Lae Jung
  • Patent number: 8956923
    Abstract: A method of fabricating a semiconductor device comprises loading a circuit board including a semiconductor chip into underfill equipment, positioning the circuit board on a depositing chuck of the underfill equipment, filling an underfill material in a space between the semiconductor chip and the circuit board placed on the depositing chuck; transferring the circuit board including the underfill material so that it is positioned on a post-treatment chuck of the underfill equipment; heating the underfill material of the circuit board placed on the post-treatment chuck in a vacuum state, and unloading the circuit board, of which the underfill material has been heated in the vacuum state, from the underfill equipment.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Ja Kim, Jun-Young Ko, Dae-Young Jeong, Dae-Sang Chan
  • Publication number: 20130337616
    Abstract: A method of fabricating a semiconductor device comprises loading a circuit board including a semiconductor chip into underfill equipment, positioning the circuit board on a depositing chuck of the underfill equipment, filling an underfill material in a space between the semiconductor chip and the circuit board placed on the depositing chuck; transferring the circuit board including the underfill material so that it is positioned on a post-treatment chuck of the underfill equipment; heating the underfill material of the circuit board placed on the post-treatment chuck in a vacuum state, and unloading the circuit board, of which the underfill material has been heated in the vacuum state, from the underfill equipment.
    Type: Application
    Filed: March 15, 2013
    Publication date: December 19, 2013
    Applicant: SAMSUNG ELECTRONICS CO, LTD.
    Inventors: Young-Ja KIM, Jun-Young KO, Dae-Young JEONG, Dae-Sang CHAN
  • Publication number: 20110110062
    Abstract: A stack-type semiconductor device including semiconductor chips having different backside structures and an electronic apparatus including the stack-type semiconductor device include: a base frame for a semiconductor device; a first semiconductor chip that is mounted on the base frame and has a bottom surface having a first surface roughness; and a second semiconductor chip that is mounted on the first semiconductor chip and has a bottom surface having a second surface roughness, wherein the second surface roughness is greater than the first surface roughness by 1.2 nm or more. The stack-type semiconductor device is manufactured to be thin while cracking of the first semiconductor chip is prevented. In addition, changes in data caused by charge loss resulting from diffusion of metal ions, which can occur when a stack-type semiconductor device is a memory device, is prevented.
    Type: Application
    Filed: March 9, 2010
    Publication date: May 12, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-yong Park, Heui-Seog Kim, Jun-young Ko, Dae-sang Chan
  • Patent number: 7863161
    Abstract: In a method of cutting a wafer, a supporting member is attached to an upper surface of the wafer on which semiconductor chips are formed. An opening is formed at a lower surface of the wafer along a scribe lane of the wafer. The lower surface of the wafer may be plasma-etched to reduce a thickness of the wafer. A tensile tape may be attached to the lower surface of the wafer. Here, the tensile tape includes sequentially stacked tensile films having different tensile modules. The supporting member is then removed. The tensile tape is cooled to increase the tensile modules between the tensile films. The tensile tape is tensed until the tensile films are cut using the tensile modules difference to separate the tensile tape from the semiconductor chips. Thus, the lower surface of the wafer may be plasma-etched without using an etching mask.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: January 4, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Sang Chan, Jun-Young Ko, Wha-Su Sin, Jae-Yong Park
  • Patent number: 7745932
    Abstract: Provided are a semiconductor package and a semiconductor package module including the same. The semiconductor package may include a plurality of semiconductor chips, a plurality of leads connected to pads of the semiconductor chips and externally exposed, wherein the plurality of leads may be classified into a plurality of pin groups, and the plurality of semiconductor chips may be classified into a plurality of chip groups, and the pads of the semiconductor chips of like chip groups may be connected to the leads of like pin groups.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: June 29, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-young Ko, Dae-sang Chan, Jae-yong Park, Heui-seog Kim, Wha-su Sin
  • Patent number: 7713788
    Abstract: An inexpensive method of manufacturing a semiconductor package using a redistribution substrate that is relatively thin. The method includes: attaching a semiconductor chip to a redistribution substrate; attaching the redistribution substrate to which the semiconductor chip is attached to a printed circuit board; removing a support substrate of the redistribution substrate; forming via holes to expose a bond pad of the semiconductor chip and a bond finger of the printed circuit board; and filling the via holes with a conductive material. Meanwhile, a redistribution substrate to which at least one other semiconductor chip may be mounted on the redistribution substrate.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: May 11, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Young Ko, Dae-Sang Chan, Heui-Seog Kim, Wha-Su Sin, Jae-Yong Park
  • Patent number: 7696615
    Abstract: A semiconductor device and a method of forming the same are provided. A semiconductor chip included in the semiconductor device includes a pillar-shaped terminal and a pad-shaped terminal in a terminal region. The pillar-shaped terminal is exposed at a first surface of a chip substrate in the terminal region and the pad-shaped terminal is exposed at a second surface of the chip substrate in the terminal region, where the first surface and the second surface of the chip substrate in the terminal region face oppositely from each other.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: April 13, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Young Ko, Dae-Sang Chan, Wha-Su Sin
  • Patent number: 7591714
    Abstract: A wafer grinding and tape attaching apparatus and method, the method includes providing a wafer to a chuck table, grinding a back side of the wafer, providing a wafer ring having dicing tape and attaching the dicing tape to the back side of the ground wafer.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: September 22, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Young Ko, Dae-Sang Chan, Sang-Jun Kim
  • Publication number: 20090053858
    Abstract: An inexpensive method of manufacturing a semiconductor package using a redistribution substrate that is relatively thin. The method includes: attaching a semiconductor chip to a redistribution substrate; attaching the redistribution substrate to which the semiconductor chip is attached to a printed circuit board; removing a support substrate of the redistribution substrate; forming via holes to expose a bond pad of the semiconductor chip and a bond finger of the printed circuit board; and filling the via holes with a conductive material. Meanwhile, a redistribution substrate to which at least one other semiconductor chip may be mounted on the redistribution substrate.
    Type: Application
    Filed: August 22, 2008
    Publication date: February 26, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun-Young KO, Dae-Sang CHAN, Heui-Seog KIM, Wha-Su SIN, Jae-Yong PARK
  • Publication number: 20080315408
    Abstract: Provided are a semiconductor package and a semiconductor package module including the same. The semiconductor package may include a plurality of semiconductor chips, a plurality of leads connected to pads of the semiconductor chips and externally exposed, wherein the plurality of leads may be classified into a plurality of pin groups, and the plurality of semiconductor chips may be classified into a plurality of chip groups, and the pads of the semiconductor chips of like chip groups may be connected to the leads of like pin groups.
    Type: Application
    Filed: May 21, 2008
    Publication date: December 25, 2008
    Inventors: Jun-young Ko, Dae-sang Chan, Jae-yong Park, Heui-seog Kim, Wha-su Sin
  • Publication number: 20080311727
    Abstract: In a method of cutting a wafer, a supporting member is attached to an upper surface of the wafer on which semiconductor chips are formed. An opening is formed at a lower surface of the wafer along a scribe lane of the wafer. The lower surface of the wafer may be plasma-etched to reduce a thickness of the wafer. A tensile tape may be attached to the lower surface of the wafer. Here, the tensile tape includes sequentially stacked tensile films having different tensile modules. The supporting member is then removed. The tensile tape is cooled to increase the tensile modules between the tensile films. The tensile tape is tensed until the tensile films are cut using the tensile modules difference to separate the tensile tape from the semiconductor chips. Thus, the lower surface of the wafer may be plasma-etched without using an etching mask.
    Type: Application
    Filed: June 13, 2008
    Publication date: December 18, 2008
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Dae-Sang CHAN, Jun-Young Ko, Wha-Su Sin, Jae-Yong Park
  • Publication number: 20080070382
    Abstract: A wafer fixing apparatus is disclosed including a dicing stage structured to fix a semiconductor wafer. A die attach film is disposed on the dicing stage to attach the semiconductor wafer to the dicing stage. The die attach film attaches the semiconductor wafer to the dicing stage due to the tackiness of the die attach film. A wafer ring, which may be of a metallic material, is coupled to the dicing stage using a wafer ring attaching member.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 20, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae-Sang CHAN, Jun-Young KO, Wha-Su SIN
  • Publication number: 20080012116
    Abstract: A semiconductor device and a method of forming the same are provided. A semiconductor chip included in the semiconductor device includes a pillar-shaped terminal and a pad-shaped terminal in a terminal region. The pillar-shaped terminal is exposed at a first surface of a chip substrate in the terminal region and the pad-shaped terminal is exposed at a second surface of the chip substrate in the terminal region, where the first surface and the second surface of the chip substrate in the terminal region face oppositely from each other.
    Type: Application
    Filed: July 11, 2007
    Publication date: January 17, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun-Young KO, Dae-Sang CHAN, Wha-Su SIN
  • Publication number: 20070193920
    Abstract: Example embodiments may provide an apparatus for and method of separating a semiconductor chip. In the example embodiments, a separating plate having an end insertable between a base tape and an adhesive film may move back and forth in a direction perpendicular to an edge of the semiconductor chip so as to separate the semiconductor chip. Example embodiments may allow fragile, thin semiconductor chips to be safely packaged without damage and thus may increase semiconductor chip yield.
    Type: Application
    Filed: February 23, 2007
    Publication date: August 23, 2007
    Inventors: Jun-young Ko, Dae-sang Chan, Sang-jun Kim
  • Publication number: 20070099550
    Abstract: A wafer grinding and tape attaching apparatus and method, the method includes providing a wafer to a chuck table, grinding a back side of the wafer, providing a wafer ring having dicing tape and attaching the dicing tape to the back side of the ground wafer.
    Type: Application
    Filed: April 5, 2006
    Publication date: May 3, 2007
    Inventors: Jun-Young Ko, Dae-Sang Chan, Sang-Jun Kim
  • Publication number: 20070057410
    Abstract: Example embodiments of the present invention relate to a method of packaging a semiconductor device. Other example embodiments of the present invention relate to a method of fabricating wafer chips for packaging a semiconductor device. Provided is a method of fabricating a wafer chips, which can perform a reliable pick-up process by removing the adhesive component adhering onto the cutting surfaces of the wafer chips, the diced DAF and the first base film. The method includes preparing at least one wafer, attaching at least one film onto a back surface of the wafer to support the wafer, forming wafer chips by dicing the wafer, detaching the at least one film from the wafer chips and attaching at least one base film onto the wafer chips to support the wafer chips.
    Type: Application
    Filed: August 8, 2006
    Publication date: March 15, 2007
    Inventors: Dae-sang Chan, Jun-young Ko, Sang-jun Kim, Wha-su Sin