Abstract: A circuit for driving an organic light emitting diode display includes a display panel that displays an image by using organic light emitting diodes disposed at intersection areas of a plurality of gate lines and a plurality of data lines; a threshold voltage detection control unit that supplies a precharge voltage by sequentially turning on transistors for threshold voltage detection, which are connected among the data lines and the organic light emitting diodes on the display panel, in units of horizontal lines, and enables threshold voltages to be detected; and a source driver that detects threshold voltages of all organic light emitting diodes arranged on a corresponding horizontal line, and repeats an operation, as necessary, for sampling/holding the detected threshold voltages through M sample/hold circuits, converting the sampled/held threshold voltages into digital signals, and storing the digital signals in a memory.

Abstract: A layout of a liquid crystal display driving circuit is capable of minimizing an area which the layout occupies. The layout of the liquid crystal display driving circuit transmits positive analog voltages and negative analog voltages to a liquid crystal display, and includes a digital-to-analog converter (DAC) block and a buffer block. The DAC block has N/2 positive DACs generating the respective positive analog voltages corresponding to corresponding digital data using a positive reference voltage, where N is the integer, and N/2 negative DACs generating the respective negative analog voltages corresponding to corresponding digital data using a negative reference voltage. The buffer block has N/2 positive and negative buffers, which buffer the N/2 positive and negative analog voltages, and are alternately arranged. The N/2 positive and negative DACs are divided into groups one by one or in twos or more, and the groups are alternately arranged.

Abstract: Disclosed is a liquid crystal display panel driving circuit for driving a liquid crystal display panel with a resolution of N bits. N-bit digital data including upper X bits and lower Y bits is inputted. The liquid crystal display panel driving circuit includes a resistor string unit according to areas, a DAC converter switching unit according to areas, and an interpolation amplifier. The resistor string unit outputs analog reference voltages at different ratios according to three areas. The DAC converter switching unit receives the N-bit digital data, selects (Y+1) analog voltages from the analog reference voltages based on the upper X bits, outputs the (Y+1) analog voltages, and outputs the (Y+1) analog voltages of different combinations based on the lower Y bits. The interpolation amplifier receives the (Y+1) analog voltages and generates an interpolated output voltage by setting weights for the (Y+1) analog voltages by using multi-factors.

Abstract: A pad layout structure of a driver IC chip to be mounted to a liquid crystal display panel. The pad layout structure includes power pad sections placed at respective four corners of the driver IC chip and each having a first power pad for supplying first power to the driver IC chip, a second power pad for supplying second power to the driver IC chip, a third power pad for supplying third power to the driver IC chip and a fourth power pad for supplying fourth power to the driver IC chip.

Abstract: A pad layout structure of a driver IC chip of a liquid crystal display device includes dummy power pads and dummy ground pads, which are disposed in corners of the driver IC chip and are connected to main power pads and main ground pads by metal lines in a chip-on-film (COF) package. Accordingly, it is possible to reduce the resistance of power supply lines and ground lines, to minimize a power dip of a block located far away from the main power pads and main ground pads, and to prevent a failure in power application, which may occur due to a decrease of adhesive strength at a specific position, by dispersing the adhesion positions of the power pads and ground pads.

Abstract: Provided is a COG panel system capable of minimizing a block dim effect by considering a relationship among a plurality of chips. The COG panel system includes: an FPC which supplies at least two power supply voltages having a constant voltage level; a plurality of SDIs which are commonly supplied with a bypass power supply voltage from the FPC and generate respective parts of a plurality of consecutive LCD driving signals required for an arbitrary one line of an LCD; and at least one block dim correction resistance.

Abstract: An touch screen liquid crystal display device includes a panel driving circuit including a gate driving block, a data driving block, and a signal control block and a liquid crystal module that stores data in data pixels through a data pixel line, to which the data pixels are connected, in response to a data signal applied from the data driving block, and reads data through a read pixel line to which read pixels are connected. The read pixels are connected to the data pixels through a share line.

Abstract: Provided is a timing adjusting method for a touch screen liquid crystal display device. A liquid crystal module of the touch screen liquid crystal display device has a structure in which a data line connected to data pixels and a read line connected to read pixels are shared by a share line, and a display mode section for displaying data of the data pixels is performed separately from a read mode section for reading data of the read pixels.

Abstract: An integrated RF card reader includes an integrated RF transmission unit including a Felica chip and a Felica security unit performing a security function that is needed to process a Felica type RF card where an RF function is removed. Since a variety of types can be embodied through a single RF transmission circuit by using the integrated RF card reader, a manufacturing cost can be reduced.

Abstract: Provided is a method of driving a liquid crystal display apparatus, and more particularly, to a method of generating a frame start pulse signal for instructing driving of a specific function of a source driver in a source driver chip of a liquid crystal display apparatus. Accordingly, by generating a frame start pulse signal for instructing driving of a specific function of a source driver in a source driver chip unlike a conventional method where the frame start pulse signal is externally input, it is possible to reduce the number of input pins for inputting the frame start pulse signal and to remove an input line for inputting the frame start pulse signal in a process of mounting the source driver chip in a printed circuit board.

Abstract: Disclosed is a power supply line in which a voltage drop generated in a resistance component of a metal line which delivers a power voltage is minimized so that the level of the power supply voltage delivered to a semiconductor chip becomes constant in the entire area of the semiconductor chip. The semiconductor chip includes: at least two power supply pads to which a power voltage applied from an external unit of the semiconductor chip is supplied; power supply main metal lines connected to each of the power supply pads; power supply branch metal lines extended from each of the power supply main metal lines to deliver a power voltage to a circuit in the semiconductor chip; and at least an electrostatic discharge (ESD) improvement dummy pad, wherein the ESD improvement dummy pad is electrically connected to the corresponding power supply main metal line and the corresponding power supply branch metal line to minimize a voltage drop.

Abstract: Disclosed is an interlock apparatus for a move-out type circuit breaker, capable of automatically discharging elastic energy charged in a closing spring and a trip spring when a main body of the circuit breaker is moved-in or moved-out, the apparatus including, a releasing protrusion member fixed to a predetermined position on a path that the circuit breaker is moved-in or moved-out and protruded upwardly from the predetermined position, an automatic releasing mechanism configured to be moved up by coming in contact with the releasing protrusion member upon moved-in or moved-out the circuit breaker to thereby drive a latching mechanism for latching the closing spring and the trip spring in a charged state to the release position.

Abstract: Disclosed are an offset compensation gamma buffer and a gray scale voltage generation circuit using the same. The offset compensation gamma buffer includes: a buffer which outputs an input voltage input to a positive or negative input terminal as an output voltage; and a switching unit which selectively connects the input voltage and the output voltage of the buffer to the positive and negative input terminals in response to a control signal. The output voltage of the offset compensation gamma buffer is supplied to the input of a gray scale voltage generation circuit of a source driver for driving a liquid crystal panel. The offset of the offset compensation gamma buffer is compensated using an inversion timing of the control signal. The output voltage of the offset compensation gamma buffer is supplied as a reference voltage of the voltage divider unit for generating the gray scale voltages, and the offset of the gray scale voltages is also compensated.

Abstract: Provided is a high-resolution display driving system without a new design of interfaces between a timing controller and DDIs, particularly, without an entire change of a DAC unit having a role of determining gradation representation of DDIs and offsets between channels. The high-resolution display driving system includes a timing controller and a DDI unit. The timing controller generates a differential clock signal and differential data. The DDI unit generates a plurality of converted signals corresponding to the differential data in response to an operation instructing signal, a reset/enable signal, and the differential clock signal. A scheme of data transmission from the timing controller to the DDI unit is at least one of a multi-drop scheme and an m-LVDS (mini low voltage differential signaling) scheme.

Abstract: Provided is an electrostatic discharge (ESD) protection device of an output driver stage of a semiconductor chip. The ESD protection device of an output driver stage, which includes a p-channel metal-oxide-semiconductor (PMOS) transistor having a source connected to a first source voltage and an n-channel metal-oxide-semiconductor (NMOS) transistor having a source connected to a second source voltage, the MOS transistors having gates applied with output signals from an internal circuit and drains connected to the output pad, wherein a distance between contacts formed on a drain region and a gate poly of the MOS transistors is relatively greater than a value according to a predetermined design rule.

Abstract: Disclosed is a circuit breaker having a rebound preventor, the circuit breaker including, a main body, a fixed contact fixed to the main body, a movable contact contactable with or separated from the fixed contact and movably installed at the main body, a main shaft connected to one side of the movable contact and rotatably installed on the main body, a trip mechanism coupled to another side of the main shaft and configured to rotate the main shaft, and a rebound preventor having one end rotatably installed on the main body and provided with a stopping unit formed at another end thereof and engaged with the main shaft, wherein the rebound preventor is rotated with being engaged with the main shaft, and the stopping unit restricts a reverse rotation of the main shaft in a state where the rebound preventor has been rotated over a prescribed range.

Abstract: Provided is a pad layout structure of a semiconductor chip capable of preventing lead-broken problems when packaging the semiconductor chip with a high aspect ratio in a tape carrier package (TCP). In the pad layout structure of the semiconductor chip, a plurality pads are arranged along upper, lower, left and right sides of the semiconductor chip with a high aspect ratio, and a longitudinal width of pads arranged at the left and right sides and a transverse width of pads arranged at both edges of the upper and lower sides are greater than a transverse width of pads arranged at centers of the upper and lower sides.

Abstract: Provided are a method of arranging gamma buffers capable of decreasing a Kelvin of a source driver included in a flat panel display and minimizing a temperature deviation between source drivers, and the flat panel display applying the method. The method of arranging a plurality of gamma buffers which are arranged in one or more source drivers to output corresponding gamma voltages, includes a step of calculating power consumptions of the gamma buffers, wherein the method further comprises one or more steps of: changing tab points of the gamma buffers by using the calculated power consumptions of the gamma buffers; and changing positions of the gamma buffers by using the calculated power consumptions of the gamma buffers.

Abstract: A soft X-ray photoionization charger includes a housing having a chamber and an aperture formed on one side surface of the housing and joined to the chamber. The chamber forms a flow path of an aerosol containing particles. A photoionizer is fixed to the aperture of the housing. The photoionizer includes a head for irradiating soft X-rays into the chamber to neutralize the particles. A transparent window is mounted between the chamber and the head. The transparent window is made of a material permitting passage of the soft X-rays. The photoionization charger further includes a soft support ring arranged around the transparent window and tightly fitted to the aperture.

Abstract: A method of removing offsets between channels of a liquid crystal panel is provided. The method includes: alternately arranging first type output buffers and second type output buffers for driving the pixels in units of at least two rows of the pixels; and arranging the first type output buffers and the second type output buffers in units of at least two columns of the pixels so that the output buffers with types opposite to those of previous two columns are arranged. The second type output buffers are embodied by switching connections among the differential transistors and connections among the load transistors in the first type output buffers.