Abstract: Disclosed is a silicon-carbon composite negative-electrode active material for a lithium secondary battery having improved electrochemical properties which contains a carbon material derived from a wood-based material and a compound containing an isocyanate functional group in order to improve unstable dispersibility of silicon-based particles used as a negative-electrode active material for a lithium secondary battery, thereby improving electrical conductivity and producing stable electrode slurry. Further, a method for producing the same, and a lithium secondary battery including the same are disclosed.

Abstract: The present invention relates to a lithium-sulfur ultracapacitor including a cathode containing a sulfur-porous carbon composite material; a separator; a lithium metal electrode disposed on an opposite side of the cathode with respect to the separator; a graphite-based electrode disposed adjacent to the lithium metal electrode; and an electrolyte impregnating the cathode, the lithium metal electrode, and the graphite-based electrode, wherein the lithium metal electrode and the graphite-based electrode together constitute an anode, and a method of preparing the lithium-sulfur ultracapacitor.

Abstract: The present invention relates to a lithium-sulfur ultracapacitor including a cathode containing a sulfur-porous carbon composite material; a separator; a lithium metal electrode disposed on an opposite side of the cathode with respect to the separator; a graphite-based electrode disposed adjacent to the lithium metal electrode; and an electrolyte impregnating the cathode, the lithium metal electrode, and the graphite-based electrode, wherein the lithium metal electrode and the graphite-based electrode together constitute an anode, and a method of preparing the lithium-sulfur ultracapacitor.

Abstract: DRAM and SRAM devices have a NAND interface mode (pins whose address and data are identical to one another are commonly used), directly being coupled to buses (an address/data bus and a control bus) of a NAND-type flash memory device that is connected to a microprocessor. Upon such a common interface mode, a DRAM device, an SRAM device, a NAND-type flash memory device, and a NOR-type flash memory device have the identical interface mode, and are independently (or individually) controlled by only one memory controller.

Abstract: DRAM and SRAM devices have a NAND interface mode (pins whose address and data are identical to one another are commonly used), directly being coupled to buses (an address/data bus and a control bus) of a NAND-type flash memory device that is connected to a microprocessor. Upon such a common interface mode, a DRAM device, an SRAM device, a NAND-type flash memory device, and a NOR-type flash memory device have the identical interface mode, and are independently (or individually) controlled by only one memory controller.