Patents by Inventor Dae Sung Kal
Dae Sung Kal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8507923Abstract: A light emitting diode (LED) package includes a first serial array of light emitting cells formed on a first substrate to emit light of a relatively short wavelength, and a second serial array of light emitting cells formed on a second substrate to emit light of a relatively long wavelength. The first and second serial arrays are connected to in reverse parallel. The LED package is capable of being operated under AC power and emitting white light with excellent color reproduction characteristics and luminous efficiency.Type: GrantFiled: July 16, 2008Date of Patent: August 13, 2013Assignee: Seoul Opto Device Co., Ltd.Inventors: Dae Won Kim, Dae Sung Kal
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Patent number: 8461770Abstract: A light-emitting diode (LED) driver used to power at least one LED with an alternating current (AC) voltage source is provided. The LED driver includes a rectifying unit applying N-fold higher voltage than the voltage from the AC voltage source to the LED. The rectifying unit includes a first charging unit to charge a first voltage, and a second charging unit to charge a second voltage. The first voltage includes the voltage at the AC voltage source during a first half-cycle of one AC voltage cycle, and the second voltage includes the first voltage and the voltage at the AC voltage source during the second half-cycle of the AC voltage cycle. Accordingly, the LED driver may improve light-emitting efficiency and reduce flicker of LEDs.Type: GrantFiled: February 12, 2010Date of Patent: June 11, 2013Assignee: Seoul Semiconductor Co., Ltd.Inventors: Kyung Hee Ye, Hyun Gu Kang, Dae Sung Kal, Won Cheol Seo
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Patent number: 8436389Abstract: The present invention relates to a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. Nitride semiconductor layers are disposed on a Gallium Nitride substrate having an upper surface. The upper surface is a non-polar or semi-polar crystal and forms an intersection angle with respect to a c-plane. The nitride semiconductor layers may be patterned to form light emitting cells separated from one another. When patterning the light emitting cells, the substrate may be partially removed in separation regions between the light emitting cells to form recess regions. The recess regions are filled with an insulating layer, and the substrate is at least partially removed by using the insulating layer.Type: GrantFiled: May 29, 2012Date of Patent: May 7, 2013Assignee: Seoul Opto Device Co., Ltd.Inventors: Kwang Choong Kim, Won Cheol Seo, Dae Won Kim, Dae Sung Kal, Kyung Hee Ye
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Patent number: 8436369Abstract: Exemplary embodiments of the present invention relate to a including a substrate, a first conductive type semiconductor layer arranged on the substrate, a second conductive type semiconductor layer arranged on the first conductive type semiconductor layer, an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer, a first electrode pad electrically connected to the first conductive type semiconductor layer, a second electrode pad arranged on the second conductive type semiconductor layer, an insulation layer disposed between the second conductive type semiconductor layer and the second electrode pad, and at least one upper extension electrically connected to the second electrode pad, the at least one upper extension being electrically connected to the second conductive type semiconductor layer.Type: GrantFiled: September 14, 2012Date of Patent: May 7, 2013Assignee: Seoul Opto Device Co., Ltd.Inventors: Won Cheol Seo, Dae Sung Kal, Kyung Hee Ye, Kyoung Wan Kim, Yeo Jin Yoon
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Publication number: 20130026498Abstract: A substrate assembly on which a first conduction-type semiconductor layer, an active layer and a second conduction-type semiconductor layer are formed is disclosed, the substrate assembly comprising a first substrate, a second substrate and a bonding layer interposed there between. In the substrate assembly, the thermal expansion coefficient of the bonding layer is smaller than or equal to that of at least one of the first and second substrates.Type: ApplicationFiled: April 7, 2011Publication date: January 31, 2013Applicant: SEOUL OPTO DEVICE CO., LTD.Inventors: Chung Hoon Lee, Kyung Hee Ye, Dae Sung Kal, Won Cheol Seo
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Patent number: 8354680Abstract: The present invention discloses an alternating current (AC) light emitting diode (LED) having half-wave light emitting cells and full-wave light emitting cells. The AC LED has a plurality of light emitting cells electrically connected between bonding pads on a single substrate. The AC LED includes a first row of half-wave light emitting cells each having an anode terminal and a cathode terminal, a second row of full-wave light emitting cells each having an anode terminal and a cathode terminal, and a third row of half-wave light emitting cells each having an anode terminal and a cathode terminal. In the AC LED, the second row is arranged between the first row and the third row, and the third row includes a pair of light emitting cells that share a cathode terminal with each other.Type: GrantFiled: September 15, 2010Date of Patent: January 15, 2013Assignee: Seoul Opto Device Co., Ltd.Inventors: Dae Sung Kal, Won Cheol Seo, Jang Woo Lee, Jin Cheol Shin, Jong Kyu Kim, Sang Ki Jin, So Ra Lee
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Publication number: 20130009197Abstract: Exemplary embodiments of the present invention relate to a including a substrate, a first conductive type semiconductor layer arranged on the substrate, a second conductive type semiconductor layer arranged on the first conductive type semiconductor layer, an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer, a first electrode pad electrically connected to the first conductive type semiconductor layer, a second electrode pad arranged on the second conductive type semiconductor layer, an insulation layer disposed between the second conductive type semiconductor layer and the second electrode pad, and at least one upper extension electrically connected to the second electrode pad, the at least one upper extension being electrically connected to the second conductive type semiconductor layer.Type: ApplicationFiled: September 14, 2012Publication date: January 10, 2013Applicant: SEOUL OPTO DEVICE CO., LTD.Inventors: Won Cheol SEO, Dae Sung KAL, Kyung Hee YE, Kyoung Wan KIM, Yeo Jin YOON
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Patent number: 8339059Abstract: An AC light emitting device is disclosed. The AC light emitting device includes at least four substrates. Serial arrays each of which has a plurality of light emitting cells connected in series are positioned on the substrates, respectively. Meanwhile, first connector means electrically connect the serial arrays formed on respective different substrates. At least two array groups each of which has at least two of the serial arrays connected in series by the first connector means are formed. The at least two array groups are connected in reverse parallel to operate. Accordingly, there is provided an AC light emitting device capable of being driven under an AC power source.Type: GrantFiled: January 30, 2012Date of Patent: December 25, 2012Assignee: Seoul Opto Device Co., Ltd.Inventors: Dae Won Kim, Dae Sung Kal
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Patent number: 8338836Abstract: An AC light emitting device, in which a plurality of light emitting cells formed on a substrate are flip-bonded to a submount to be driven under an AC power source is disclosed. The light emitting device comprises a first serial array of light emitting cells, and a second serial array of light emitting cells, wherein the second serial array is connected in reverse parallel to the first serial array. Meanwhile, bonding patterns are formed on a submount substrate, and the light emitting cells of the first and second serial arrays are flip-bonded to the bonding patterns. Further, node connecting patterns are formed on the submount substrate, and connect the bonding patterns such that nodes corresponding to each other provided in the first and second serial arrays are electrically connected to each other.Type: GrantFiled: September 5, 2007Date of Patent: December 25, 2012Assignee: Seoul Opto Device Co., Ltd.Inventors: Keon Young Lee, Dae Sung Kal
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Patent number: 8309971Abstract: Exemplary embodiments of the present invention relate to a including a substrate, a first conductive type semiconductor layer arranged on the substrate, a second conductive type semiconductor layer arranged on the first conductive type semiconductor layer, an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer, a first electrode pad electrically connected to the first conductive type semiconductor layer, a second electrode pad arranged on the second conductive type semiconductor layer, an insulation layer disposed between the second conductive type semiconductor layer and the second electrode pad, and at least one upper extension electrically connected to the second electrode pad, the at least one upper extension being electrically connected to the second conductive type semiconductor layer.Type: GrantFiled: December 21, 2010Date of Patent: November 13, 2012Assignee: Seoul Opto Device Co., Ltd.Inventors: Won Cheol Seo, Dae Sung Kal, Kyung Hee Ye, Kyoung Wan Kim, Yeo Jin Yoon
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Publication number: 20120235158Abstract: The present invention relates to a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. Nitride semiconductor layers are disposed on a Gallium Nitride substrate having an upper surface. The upper surface is a non-polar or semi-polar crystal and forms an intersection angle with respect to a c-plane. The nitride semiconductor layers may be patterned to form light emitting cells separated from one another. When patterning the light emitting cells, the substrate may be partially removed in separation regions between the light emitting cells to form recess regions. The recess regions are filled with an insulating layer, and the substrate is at least partially removed by using the insulating layer.Type: ApplicationFiled: May 29, 2012Publication date: September 20, 2012Applicant: SEOUL OPTO DEVICE CO., LTD.Inventors: Kwang Choong KIM, Won Cheol SEO, Dae Won KIM, Dae Sung KAL, Kyung Hee YE
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Patent number: 8232565Abstract: The present invention discloses a light emitting diode (LED) including a plurality of light emitting cells arranged on a substrate. The LED includes half-wave light emitting units each including at least one light emitting cell, each half-wave light emitting unit including first and second terminals respectively arranged at both ends thereof; and full-wave light emitting units each including at least one light emitting cell, each full-wave light emitting units including third and fourth terminals respectively formed at both ends thereof. The third terminal of each full-wave light emitting unit is electrically connected to the second terminals of two half-wave light emitting units, and the fourth terminal of each full-wave light emitting unit is electrically connected to the first terminals of other two half-wave light emitting units.Type: GrantFiled: October 28, 2009Date of Patent: July 31, 2012Assignee: Seoul Opto Device Co., Ltd.Inventors: Chung Hoon Lee, Dae Won Kim, Dae Sung Kal, Won Cheol Seo, Kyung Hee Ye, Yeo Jin Yoon
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Patent number: 8211724Abstract: The present invention relates to a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. Nitride semiconductor layers are disposed on a Gallium Nitride substrate having an upper surface. The upper surface is a non-polar or semi-polar crystal and forms an intersection angle with respect to a c-plane. The nitride semiconductor layers may be patterned to form light emitting cells separated from one another. When patterning the light emitting cells, the substrate may be partially removed in separation regions between the light emitting cells to form recess regions. The recess regions are filled with an insulating layer, and the substrate is at least partially removed by using the insulating layer.Type: GrantFiled: November 23, 2009Date of Patent: July 3, 2012Assignee: Seoul Opto Device Co., Ltd.Inventors: Kwang Choong Kim, Won Cheol Seo, Dae Won Kim, Dae Sung Kal, Kyung Hee Ye
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Publication number: 20120153259Abstract: A light emitting diode (LED) for minimizing crystal defects in an active region and enhancing recombination efficiency of electrons and holes in the active region includes non-polar GaN-based semiconductor layers grown on a non-polar substrate. The semiconductor layers include a non-polar N-type semiconductor layer, a non-polar P-type semiconductor layer, and non-polar active region layers positioned between the N-type semiconductor layer and the P-type semiconductor layer. The non-polar active region layers include a well layer and a barrier layer with a superlattice structure.Type: ApplicationFiled: February 27, 2012Publication date: June 21, 2012Applicant: SEOUL OPTO DEVICE CO., LTD.Inventors: Chung Hoon LEE, Ki Bum NAM, Dae Sung KAL
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Publication number: 20120139444Abstract: The disclosed light emitting device comprises at least one first light emitting element including at least one light emitting chip for emitting light having a wavelength of 400 to 500 nm and a phosphor; and at least one second light emitting element disposed adjacent to the first light emitting element to emit light having a wavelength of 560 to 880 nm.Type: ApplicationFiled: June 2, 2011Publication date: June 7, 2012Applicant: SEOUL OPTO DEVICE CO., LTD.Inventors: Dae Won KIM, Do Hyung KIM, Dae Sung KAL, In Kyu PARK
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Patent number: 8188489Abstract: The present invention discloses a light emitting diode (LED) including a plurality of light emitting cells arranged on a substrate. The LED includes half-wave light emitting units each including at least one light emitting cell, each half-wave light emitting unit including first and second terminals respectively arranged at both ends thereof; and full-wave light emitting units each including at least one light emitting cell, each full-wave light emitting units including third and fourth terminals respectively formed at both ends thereof. The third terminal of each full-wave light emitting unit is electrically connected to the second terminals of two half-wave light emitting units, and the fourth terminal of each full-wave light emitting unit is electrically connected to the first terminals of other two half-wave light emitting units.Type: GrantFiled: October 28, 2009Date of Patent: May 29, 2012Assignee: Seoul Opto Device Co., Ltd.Inventors: Chung Hoon Lee, Dae Won Kim, Dae Sung Kal, Won Cheol Seo, Kyung Hee Ye, Yeo Jin Yoon
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Publication number: 20120127718Abstract: An AC light emitting device is disclosed. The AC light emitting device includes at least four substrates. Serial arrays each of which has a plurality of light emitting cells connected in series are positioned on the substrates, respectively. Meanwhile, first connector means electrically connect the serial arrays formed on respective different substrates. At least two array groups each of which has at least two of the serial arrays connected in series by the first connector means are formed. The at least two array groups are connected in reverse parallel to operate. Accordingly, there is provided an AC light emitting device capable of being driven under an AC power source.Type: ApplicationFiled: January 30, 2012Publication date: May 24, 2012Applicant: SEOUL OPTO DEVICE CO., LTD.Inventors: Dae Won KIM, Dae Sung KAL
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Patent number: 8173459Abstract: Disclosed is a light emitting device having an isolating insulative layer for isolating light emitting cells from one another and a method of fabricating the same. The light emitting device comprises a substrate and a plurality of light emitting cells formed on the substrate. Each of the light emitting cells includes a lower semiconductor layer, an upper semiconductor layer positioned on one region of the lower semiconductor layer, and an active layer interposed between the lower and upper semiconductor layers. Furthermore, an isolating insulative layer is filled in regions between the plurality of light emitting cells to isolate the light emitting cells from one another. Further, wirings electrically connect the light emitting cells with one another. Each of the wirings connects the lower semiconductor layer of one light emitting cell and the upper semiconductor layer of another light emitting cell adjacent to the one light emitting cell.Type: GrantFiled: December 16, 2010Date of Patent: May 8, 2012Assignee: Seoul Opto Device Co., Ltd.Inventors: Dae Won Kim, Dae Sung Kal
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Patent number: 8154008Abstract: A light emitting diode (LED) for minimizing crystal defects in an active region and enhancing recombination efficiency of electrons and holes in the active region includes non-polar GaN-based semiconductor layers grown on a non-polar substrate. The semiconductor layers include a non-polar N-type semiconductor layer, a non-polar P-type semiconductor layer, and non-polar active region layers positioned between the N-type semiconductor layer and the P-type semiconductor layer. The non-polar active region layers include a well layer and a barrier layer with a superlattice structure.Type: GrantFiled: July 24, 2008Date of Patent: April 10, 2012Assignee: Seoul Opto Device Co., Ltd.Inventors: Chung Hoon Lee, Ki Bum Nam, Dae Sung Kal
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Publication number: 20120074441Abstract: Exemplary embodiments of the present invention provide a wafer-level light emitting diode (LED) package and a method of fabricating the same. The LED package includes a semiconductor stack including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer; a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes; a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and a protective insulation layer covering a sidewall of the semiconductor stack.Type: ApplicationFiled: July 29, 2011Publication date: March 29, 2012Applicant: SEOUL SEMICONDUCTOR CO., LTD.Inventors: Won Cheol SEO, Dae Sung KAL