Abstract: Disclosed are a cloned pig expressing green fluorescent protein (GFP) and a cloned pig having a 1,3-galactosyltransferase (GT) gene knocked out. Also, the present invention discloses methods of producing such cloned pigs, comprising the steps of establishing a somatic cell line; preparing a GFP-transfected or GT gene knock-out nuclear donor cell; producing a transgenic nuclear transfer embryo using the nuclear donor cell and a recipient oocyte; and transplanting the transgenic nuclear transfer embryo into a surrogate mother pig. The cloned pig expressing GFP of the present invention is useful for large-scale production of an animal disease model, and the GT gene knock-out cloned pig can be used as a organ donor allowing xenotransplantation in humans without hyperacute immune rejection.

Abstract: A thermal refiningless, hot-rolled steel exhibits impact strength in excess of 10kgf.multidot.m/cm.sup.2 and contains, expressed in terms of weight percent, 0.30-0.50% carbon, 0.15-0.60% silicon, 0.80-1.60% manganese, up to 0.02% phosphorus, up to 0.015% sulfur, 0.07-0.20% vanadium, 0.015-0.06% aluminum, 0.005-0.015% nitrogen, up to 0.0015% oxygen, the balance iron and unavoidable impurities. The steel of the above-identified property and composition is produced by casting a steel product of predetermined cross-sectional shape; heating the steel product up to a temperature of 1,100.degree.-1,250.degree. C.; hot-rolling the heated steel product at a final rolling temperature of 850.degree.1,000.degree. C.; normalizing the hot-rolled steel product at a temperature of 880.degree.-950.degree. C.; and cooling the normalized steel product down to 300.degree. C. at a cooling speed of 5.degree.-100.degree. C./min.

Abstract: A method and a system for interfacing a PC to CD-ROM drives wherein the PC as a host can perform a different job while one of the CD-ROM drives selected as a target prepares for data to be transmitted to the host PC, thereby resulting in an increase in the interfacing efficiency.

Abstract: A subcode reading apparatus for a compact disc player, designed to automatically read subcode data recorded on a compact disc without depending on a system controller, which includes a timing control circuit for storing in a memory the subcode data of successive blocks outputted from a CD digital signal processing circuit according to a command signal from the system controller. According to the present invention, the efficiency of the system controller can be increased and the overall construction of the system may be simplified.

Abstract: A continuous data input control system for an optical disk comprising an optical disk digital signal processor for outputting serial data, beat clock signal and left/right clock signal, an optical disk ROM decoder for decoding and transmitting the data from the processor, a microprocessor for controlling the whole system, and a data input controller for controlling the output of the digital signal processor. The data input controller includes a clock generator, a counter, a first control signal generator, an AND gate, a stop point detector for shifting the serial data of the digital signal processing unit by synchronization with the clock pulse signal of an AND gate, for latching the data when the buffer RAM is in the overflow state in response to the output level of the control signal generating unit, and for detecting the data of the stop point by comparing the latched data with the data being presently inputted, when the overflow of the buffer RAM is released.

Abstract: The DRAM cell of the invention comprises a structure wherein a deep trench is formed on a silicon wafer, a stacked trench capacitor is formed around a silicon pillar associated with the trench, and a vertical transfer transistor is formed on top of the silicon pillar after the formation of the stacked trench capacitor. The transfer transistor is connected to the storage capacitor through a selectively doped n.sup.+ diffused layer, and isolation between DRAM cells is formed by the trench.

Abstract: A method for manufacturing a DRAM cell is provided having an isolation merged trench for applying to 16 megabit and 64 megabit DRAM cells, which includes the steps forming a primary dielectric for a capacitor within the interior of a trench, depositing an n.sup.+ doped polysilicon, forming a secondary dielectric and then stacking polysilicon thereon and connecting the polysilicon within an n.sup.+ diffusion layer of the bottom of the trench for forming a plate. As a result of this method all of the capacitors disposed between the n.sup.+ polysilicon storing electrode and the n.sup.+ polysilicon plate as well as the polysilicon storing electrode and the n.sup.+ diffusion layer plate are utilized as a storing capacitor.

Abstract: A system for inserting a synchronizing pattern in digital voice data on an optical disk comprising a synchronizing pattern input controller for generating the synchronizing pattern in accordance with a synchronizing pattern insert signal outputted from a microprocessor to control the serial data and the beat clock from the optical disk digital signal processor and indicate that inserting the synchronizing pattern has been completed. The synchronizing pattern input controller includes a clock generator, a timing controller, a counting unit, a synchronizing pattern generator, a control signal generator, and a switching unit. Therefore, the data having no synchronizing pattern such as the digital voice data loaded on the optical disk, which is outputted from the optical disk digital signal processor, can be normally inputted to the optical disk ROM decoder by the synchronizing pattern generated externally.

Abstract: A DRAM cell of a stack structure having a cup-shaped polysilicon storage electrode for being applied to a 16 mega and 64 mega DRAM wherein a transfer transistor is firstly manufactured, a bit line is formed, an oxide film grid is formed between the cell and cell in the minimum design rule, and upon completing this, the polysilicon storage electrode is formed into a single or double cup shape, whereby the capacitor area is remarkably increased when compared with the conventional stacked structure DRAM cell so that the area efficiency is greatly increased and the process can be executed by such a mask number as the prior stacked structure mask layer number and the structure thereof is simple.