Patents by Inventor Dae Young Kwak
Dae Young Kwak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955531Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.Type: GrantFiled: February 27, 2023Date of Patent: April 9, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Dae-young Kwak, Ji-ye Kim, Jung-hwan Chun, Min-chan Gwak, Dong-hyun Roh, Jin-wook Lee, Sang-jin Hyun
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Publication number: 20230207662Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.Type: ApplicationFiled: February 27, 2023Publication date: June 29, 2023Inventors: Dae-young KWAK, Ji -ye KIM, Jung-hwan CHUN, Min-chan GWAK, Dong-hyun ROH, Jin-wook LEE, Sang-jin HYUN
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Patent number: 11626503Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.Type: GrantFiled: August 3, 2021Date of Patent: April 11, 2023Inventors: Dae-young Kwak, Ji-ye Kim, Jung-hwan Chun, Min-chan Gwak, Dong-hyun Roh, Jin-wook Lee, Sang-jin Hyun
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Publication number: 20210384321Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.Type: ApplicationFiled: August 3, 2021Publication date: December 9, 2021Inventors: Dae-young KWAK, Ji -ye KIM, Jung-hwan CHUN, Min-chan GWAK, Dong-hyun ROH, Jin-wook LEE, Sang-jin HYUN
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Patent number: 11114544Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.Type: GrantFiled: August 27, 2019Date of Patent: September 7, 2021Inventors: Dae-young Kwak, Ji-ye Kim, Jung-hwan Chun, Min-chan Gwak, Dong-hyun Roh, Jin-wook Lee, Sang-jin Hyun
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Patent number: 10840331Abstract: A semiconductor device includes active patterns protruding from a substrate and an insulation structure surrounding lower portions of the active patterns. The insulation structure includes an insulation layer conforming to a top surface of the substrate and to sidewalls of the active patterns and a buried insulation pattern on the insulation layer.Type: GrantFiled: April 17, 2018Date of Patent: November 17, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Guyoung Cho, Dae-Young Kwak, Shinhye Kim, Koungmin Ryu, Sangjin Hyun
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Publication number: 20200168720Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.Type: ApplicationFiled: August 27, 2019Publication date: May 28, 2020Inventors: Dae-young Kwak, Ji-ye Kim, Jung-hwan Chun, Min-chan Gwak, Dong-hyun Roh, Jin-wook Lee, Sang-jin Hyun
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Patent number: 10566326Abstract: Semiconductor devices are provided. A semiconductor device includes a semiconductor substrate. The semiconductor device includes first and second source/drain regions in the semiconductor substrate. Moreover, the semiconductor device includes a multi-layer device isolation region in the semiconductor substrate between the first and second source/drain regions. The multi-layer device isolation region includes a protruding portion that protrudes away from the semiconductor substrate beyond respective uppermost surfaces of the first and second source/drain regions.Type: GrantFiled: July 6, 2017Date of Patent: February 18, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Dae Young Kwak, Ki Byung Park, Kyoung Hwan Yeo, Seung Jae Lee, Kyung Yub Jeon, Seung Seok Ha, Sang Jin Hyun
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Publication number: 20190058035Abstract: A semiconductor device includes active patterns protruding from a substrate and an insulation structure surrounding lower portions of the active patterns. The insulation structure includes an insulation layer conforming to a top surface of the substrate and to sidewalls of the active patterns and a buried insulation pattern on the insulation layer.Type: ApplicationFiled: April 17, 2018Publication date: February 21, 2019Inventors: Guyoung Cho, Dae-Young Kwak, Shinhye Kim, Koungmin Ryu, Sangjin Hyun
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Patent number: 10032641Abstract: A semiconductor device is provided as follows. A first fin-type pattern is disposed on a substrate. A first field insulating film is adjacent to a sidewall of the first fin-type pattern. A second field insulating film is adjacent to a sidewall of the first field insulating film. The first field insulating film is interposed between the first fin-type pattern and the second field insulating film. The second field insulating film comprises a first region and a second region. The first region is closer to the sidewall of the first field insulating film. A height from a bottom of the second field insulating film to an upper surface of the second region is larger than a height from the bottom of the second field insulating film to an upper surface of the first region.Type: GrantFiled: April 25, 2016Date of Patent: July 24, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dae-Young Kwak, Kyung-Seok Oh, Seung-Jae Lee, Sang-Jin Hyun
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Publication number: 20180090493Abstract: Semiconductor devices are provided. A semiconductor device includes a semiconductor substrate. The semiconductor device includes first and second source/drain regions in the semiconductor substrate. Moreover, the semiconductor device includes a multi-layer device isolation region in the semiconductor substrate between the first and second source/drain regions. The multi-layer device isolation region includes a protruding portion that protrudes away from the semiconductor substrate beyond respective uppermost surfaces of the first and second source/drain regions.Type: ApplicationFiled: July 6, 2017Publication date: March 29, 2018Inventors: Dae Young Kwak, Ki Byung Park, Kyoung Hwan Yeo, Seung Jae Lee, Kyung Yub Jeon, Seung Seok Ha, Sang Jin Hyun
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Publication number: 20160380050Abstract: A semiconductor device is provided as follows. A first fin-type pattern is disposed on a substrate. A first field insulating film is adjacent to a sidewall of the first fin-type pattern. A second field insulating film is adjacent to a sidewall of the first field insulating film. The first field insulating film is interposed between the first fin-type pattern and the second field insulating film. The second field insulating film comprises a first region and a second region. The first region is closer to the sidewall of the first field insulating film. A height from a bottom of the second field insulating film to an upper surface of the second region is larger than a height from the bottom of the second field insulating film to an upper surface of the first region.Type: ApplicationFiled: April 25, 2016Publication date: December 29, 2016Inventors: Dae-Young Kwak, Kyung-Seok Oh, Seung-Jae Lee, Sang-Jin Hyun
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Patent number: 9305921Abstract: A semiconductor device including: a first gate pattern disposed in a peripheral region of a substrate; a second gate pattern disposed in a cell region of the substrate; a first insulator formed on sidewalls of the first gate pattern; and a second insulator formed on sidewalls of the second gate pattern, wherein a dielectric constant of the first insulator is different from a dielectric constant of the second insulator, and wherein a height of the second insulator is greater than a height of the second gate pattern.Type: GrantFiled: December 10, 2014Date of Patent: April 5, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jung-Chan Lee, Seung-Jae Lee, Sang-Bom Kang, Dae-Young Kwak, Myeong-Cheol Kim, Yong-Ho Jeon
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Publication number: 20150145056Abstract: A semiconductor device including: a first gate pattern disposed in a peripheral region of a substrate; a second gate pattern disposed in a cell region of the substrate; a first insulator formed on sidewalls of the first gate pattern; and a second insulator formed on sidewalls of the second gate pattern, wherein a dielectric constant of the first insulator is different from a dielectric constant of the second insulator, and wherein a height of the second insulator is greater than a height of the second gate pattern.Type: ApplicationFiled: December 10, 2014Publication date: May 28, 2015Inventors: Jung-Chan Lee, Seung-Jae Lee, Sang-Bom Kang, Dae-Young Kwak, Myeong-Cheol Kim, Yong-Ho Jeon
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Patent number: 8916936Abstract: A semiconductor device including: a first gate pattern disposed in a peripheral region of a substrate; a second gate pattern disposed in a cell region of the substrate; a first insulator formed on sidewalls of the first gate pattern; and a second insulator formed on sidewalls of the second gate pattern, wherein a dielectric constant of the first insulator is different from a dielectric constant of the second insulator, and wherein a height of the second insulator is greater than a height of the second gate pattern.Type: GrantFiled: January 28, 2013Date of Patent: December 23, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Chan Lee, Seung-Jae Lee, Sang-Bom Kang, Dae-Young Kwak, Myeong-Cheol Kim, Yong-Ho Jeon
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Patent number: 8733790Abstract: An active safety apparatus for vehicles and a method of controlling the apparatus, which can actively control the operation of a safety device, such as an airbag device or a seatbelt device installed in a vehicle for restraining a passenger behavior and protecting a passenger in a vehicle collision, based on the conditions of a vehicle collision and the passenger behavior which vary depending on the conditions of the vehicle collision, thereby optimally protecting the passenger for the conditions of the vehicle collision and improving passenger safety of the vehicle.Type: GrantFiled: November 23, 2011Date of Patent: May 27, 2014Assignees: Hyundai Motor Company, Industry-University Cooperation Foundation Sogang UniversityInventors: Jae Haeng Yoo, Dae Young Kwak, Hyun Yong Jeong, Won Min Choi
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Patent number: 8691642Abstract: A method of fabricating a semiconductor device includes forming gate structures on PMOS and NMOS transistor regions of the semiconductor substrate, forming epitaxial blocking layers on source/drain regions of PMOS and NMOS transistor regions using a nitridation process, then selectively removing one of the epitaxial blocking layers, and using a SEG process to form an epitaxial layer on respective source/drain regions while shielding the other source/drain regions with a remaining epitaxial blocking layer.Type: GrantFiled: September 21, 2011Date of Patent: April 8, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Chan Lee, Seung-Jae Lee, Yu-Gyun Shin, Dae-Young Kwak, Byung-Suk Jung
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Publication number: 20140054713Abstract: A semiconductor device including: a first gate pattern disposed in a peripheral region of a substrate; a second gate pattern disposed in a cell region of the substrate; a first insulator formed on sidewalls of the first gate pattern; and a second insulator formed on sidewalls of the second gate pattern, wherein a dielectric constant of the first insulator is different from a dielectric constant of the second insulator, and wherein a height of the second insulator is greater than a height of the second gate pattern.Type: ApplicationFiled: January 28, 2013Publication date: February 27, 2014Inventors: Jung-Chan Lee, Seung-Jae Lee, Sang-Bom Kang, Dae-Young Kwak, Myeong-Cheol Kim, Yong-Ho Jeon
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Patent number: 8617991Abstract: A method of manufacturing a semiconductor device includes forming an interlayer dielectric film that has first and second trenches on first and second regions of a substrate, respectively, forming a first metal layer along a sidewall and a bottom surface of the first trench and along a top surface of the interlayer dielectric film in the first region, forming a second metal layer along a sidewall and a bottom surface of the second trench and along a top surface of the interlayer dielectric film in the second region, forming a first sacrificial layer pattern on the first metal layer such that the first sacrificial layer fills a portion of the first trench, forming a first electrode layer by etching the first metal layer and the second metal layer using the first sacrificial layer pattern, and removing the first sacrificial layer pattern.Type: GrantFiled: June 19, 2012Date of Patent: December 31, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Chan Lee, Yoo-Jung Lee, Ki-Hyung Ko, Dae-Young Kwak, Seung-Jae Lee, Jae-Sung Hur, Sang-Bom Kang, Cheol Kim, Bo-Un Yoon
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Patent number: 8596675Abstract: A dual chamber side air bag apparatus may include an inflator mounted to a side of a seat back frame in an outdoor direction, an air bag cushion fluid-connected to the inflator and including a first chamber and a second chamber mounted at a side of the seat back frame in the outdoor direction and fluid-connected to the inflator and the first chamber to protrude and develop toward a front of the seat back frame when the inflator may be activated, for protecting side surface of the upper body of the passenger, and a tether having one end thereof fixed to the scat back frame, a raid portion thereof wrapping the first chamber, and the other end thereof sewing-coupled to the air bag cushion in a boundary of the first and second chambers to provide a directivity so that the first chamber develops toward the upper body of the passengers.Type: GrantFiled: July 5, 2012Date of Patent: December 3, 2013Assignees: Hyundai Motor Company, Kia Motors CorporationInventors: Hyock In Kwon, Hyeong Ho Choi, Dae Young Kwak, Tae Ik Gwon, Soon Bok Lee