Patents by Inventor Dae-Ho Lim

Dae-Ho Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9653034
    Abstract: Provided are a column data driver configured to apply a voltage or current corresponding to image data to a display panel, a display device having the column data driver, and a driving method of the display device. The column data driving circuit includes a precharge unit configured to precharge at least one of a plurality of column lines in response to a plurality of preset signals corresponding to image data; and a driving unit configured to sequentially drive the plurality of column lines in response to a data signal corresponding to the image data.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: May 16, 2017
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Ki-Seok Cho, Hee-Jung Kim, Dae-Ho Lim
  • Patent number: 9246126
    Abstract: An OLED display is disclosed. The display includes a rear substrate, a front substrate facing the rear substrate, a cell seal provided between the rear and front substrates to adhere the two substrates to each other, and a reinforcement member provided between the rear and front substrates adjacent to the cell seal to adhere the two substrates to each other.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: January 26, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-wook Shin, Taek-Gyun Chung, Ji-Mi Yoon, Ung-Soo Lee, Tae-Min Kim, Dae-Ho Lim
  • Patent number: 8654254
    Abstract: An apparatus for driving a display panel includes: a time variant signal (TVS) generator configured to generate a time variant signal group; a common pulse signal generator configured to generate a plurality of pulse signals; a selector configured to receive the time variant signal, the plurality of the pulse signals, and video data and select a grayscale voltage corresponding to the video data; and a buffer configured to buffer and transfer an output of the selector. Herein, the selector and the buffer are provided to each of a plurality of channels, and the time variant signal and the plurality of the pulse signals are inputted in common to the selector of each channel.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: February 18, 2014
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Beom-Jin Kim, Hee-Jung Kim, Dae-Ho Lim, Ki-Seok Cho
  • Publication number: 20130334495
    Abstract: A superlattice structure, and a semiconductor device including the same, include a plurality of pairs of layers are in a pattern repeated at least two times, in which a first layer and a second layer constitute a pair, the first layer is formed of AlxInyGa1-x-yN (where 0?x and y?1), the second layer is formed of AlaInbGa1-a-bN (where 0?a, b?1 and x?a), the first and second layers have the same thickness, and a total thickness of each of the plurality of pairs of layers is different than each other.
    Type: Application
    Filed: March 15, 2013
    Publication date: December 19, 2013
    Inventors: Dae-ho LIM, Joo-sung KIM, Jae-kyun KIM, Young-jo TAK
  • Patent number: 8456605
    Abstract: A flat display panel having a first substrate, a display unit disposed on the first substrate, a second substrate disposed on the first substrate to cover the display unit and not covering a predetermined region of the first substrate, a terminal unit disposed on the predetermined region of the first substrate and is electrically connected to the display unit, and a glass strengthener coated on the first substrate and adjacent to the second substrate at a location to increase the strength of the first substrate. The flat display panel having the substrate on which a terminal unit is formed has increased strength.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: June 4, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dae-Ho Lim, Il-Kwon Jeon, Joo-Heon Kim, Jang-Hwan Shin, Jung-Hwan Byun, Jeong-Hun Park
  • Patent number: 8203834
    Abstract: A flat panel display apparatus includes a flat display panel including first and second substrates facing each other with a display unit therebetween, the first substrate extending beyond the second substrate, a portion of the first substrate extending beyond the second substrate defining a protruding portion, an outermost edge of the protruding portion defining a protruding edge of the first substrate, and corners of the protruding portion being chamfered, and a bezel surrounding the flat display panel.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: June 19, 2012
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Oh-June Kwon, Seung-Yong Song, Kwan-Hee Lee, Young-Seo Choi, Sun-Young Jung, Ji-Hun Ryu, Young-Cheol Joo, Jung-Jun Im, Dong-Su Yee, Chan-Hee Wang, Chan-Kyoung Moon, Jang-Hwan Shin, Dae-Ho Lim, Rog Hur, Kuen-Dong Ha
  • Patent number: 8040593
    Abstract: Example embodiments relate to a transflective display apparatus using dielectrophoresis and a method of manufacturing the transflective display apparatus. The display apparatus may include a display panel; a backlight unit providing the display panel with light for forming an image; and a reflective plate arranged under the backlight unit. The reflective plate may reflect external light incident thereon via the display panel back to the display panel. The display panel may include a plurality of pixel areas transmitting or blocking light using dielectrophoresis.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: October 18, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yun-woo Nam, Dae-ho Lim
  • Publication number: 20110069232
    Abstract: An apparatus for driving a display panel includes: a time variant signal (TVS) generator configured to generate a time variant signal group; a common pulse signal generator configured to generate a plurality of pulse signals; a selector configured to receive the time variant signal, the plurality of the pulse signals, and video data and select a grayscale voltage corresponding to the video data; and a buffer configured to buffer and transfer an output of the selector. Herein, the selector and the buffer are provided to each of a plurality of channels, and the time variant signal and the plurality of the pulse signals are inputted in common to the selector of each channel.
    Type: Application
    Filed: August 24, 2010
    Publication date: March 24, 2011
    Applicant: MAGNACHIP SEMICONDUCTOR, LTD.
    Inventors: Beom-Jin KIM, Hee-Jung Kim, Dae-Ho Lim, Ki-Seok Cho
  • Publication number: 20100277855
    Abstract: A flat display panel having a first substrate, a display unit disposed on the first substrate, a second substrate disposed on the first substrate to cover the display unit and not covering a predetermined region of the first substrate, a terminal unit disposed on the predetermined region of the first substrate and is electrically connected to the display unit, and a glass strengthener coated on the first substrate and adjacent to the second substrate at a location to increase the strength of the first substrate. The flat display panel having the substrate on which a terminal unit is formed has increased strength.
    Type: Application
    Filed: April 30, 2010
    Publication date: November 4, 2010
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Dae-Ho Lim, Il-Kwon Jeon, Joo-Heon Kim, Jang-Hwan Shin, Jung-Hwan Byun, Jeong-Hun Park
  • Publication number: 20100117067
    Abstract: An OLED display is disclosed. The display includes a rear substrate, a front substrate facing the rear substrate, a cell seal provided between the rear and front substrates to adhere the two substrates to each other, and a reinforcement member provided between the rear and front substrates adjacent to the cell seal to adhere the two substrates to each other.
    Type: Application
    Filed: November 10, 2009
    Publication date: May 13, 2010
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Sang-Wook Sin, Taek-Gyun Chung, Ji-Mi Yoon, Ung-Soo Lee, Tae-Min Kim, Dae-Ho Lim
  • Publication number: 20100045638
    Abstract: Provided are a column data driver configured to apply a voltage or current corresponding to image data to a display panel, a display device having the column data driver, and a driving method of the display device. The column data driving circuit includes a precharge unit configured to precharge at least one of a plurality of column lines in response to a plurality of preset signals corresponding to image data; and a driving unit configured to sequentially drive the plurality of column lines in response to a data signal corresponding to the image data.
    Type: Application
    Filed: May 29, 2009
    Publication date: February 25, 2010
    Inventors: Ki- Seok CHO, Hee-Jung Kim, Dae-Ho Lim
  • Publication number: 20090185339
    Abstract: A flat panel display apparatus includes a flat display panel including first and second substrates facing each other with a display unit therebetween, the first substrate extending beyond the second substrate, a portion of the first substrate extending beyond the second substrate defining a protruding portion, an outermost edge of the protruding portion defining a protruding edge of the first substrate, and corners of the protruding portion being chamfered, and a bezel surrounding the flat display panel.
    Type: Application
    Filed: January 14, 2009
    Publication date: July 23, 2009
    Inventors: Oh-June Kwon, Seung-Yong Song, Kwan-Hee Lee, Young-Seo Choi, Sun-Young Jung, Ji-Hun Ryu, Young-Cheol Joo, Jung-Jun Im, Dong-Su Yee, Chan-Hee Wang, Chan-Kyoung Moon, Jang-Hwan Shin, Dae-Ho Lim, Rog Hur, Kuen-Dong Ha
  • Patent number: 7068075
    Abstract: A multi-level voltage output control circuit selectively outputs one of multi-level power voltages by driving gates of two MOS transistors, which act as switching devices for the multi-level power voltages, with two output signals, the two output signals having complementary phases to each other and generated from two logic gates receiving two input signals which have an identical timing and complementary phases to each other, wherein the two logic gates advance or slow down a rising timing and/or a falling timing of the two output signals by differently adjusting a size of PMOS transistors and that of NMOS transistors, which construct the logic gates, thereby excluding a case in which the two output signals are in a same logic state at the same time.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: June 27, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Dae-Ho Lim
  • Publication number: 20060104325
    Abstract: A laser diode without a ridge and a method of fabricating the same are provided. The laser diode includes an active layer and upper and lower clad layers. A current blocking layer formed of a semiconductor material is formed on the upper clad layer, and a current passing region is formed using doping through the current blocking layer. The current passing region diffuses down into the upper clad layer. Since the laser diode includes no ridge, it can be fabricated in a simple fabrication process at a low production cost.
    Type: Application
    Filed: September 8, 2005
    Publication date: May 18, 2006
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Dae-ho Lim
  • Publication number: 20060078023
    Abstract: A laser diode and a method of fabricating the same are provided. An embodiment of the laser includes a substrate; at least one material layer formed on the substrate and having a current passing region and a current block region which is composed of oxide and disposed at both sides of the current passing region; and a laser oscillating layer formed on the material layer.
    Type: Application
    Filed: May 13, 2005
    Publication date: April 13, 2006
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Dae-ho Lim
  • Publication number: 20050218932
    Abstract: A multi-level voltage output control circuit selectively outputs one of multi-level power voltages by driving gates of two MOS transistors, which act as switching devices for the multi-level power voltages, with two output signals, the two output signals having complementary phases to each other and generated from two logic gates receiving two input signals which have an identical timing and complementary phases to each other, wherein the two logic gates advance or slow down a rising timing and/or a falling timing of the two output signals by differently adjusting a size of PMOS transistors and that of NMOS transistors, which construct the logic gates, thereby excluding a case in which the two output signals are in a same logic state at the same time.
    Type: Application
    Filed: June 25, 2004
    Publication date: October 6, 2005
    Inventor: Dae-Ho Lim