Abstract: A device to receive a first signal from a driver. The device comprising a first circuit, a second circuit, a third circuit, and a fourth circuit. The first circuit to provide a second signal having a first level. The second circuit to detect the first level of the first signal and to provide a third signal to control a third circuit of the device. The third circuit to provide a fourth signal, the fourth signal having a first level in response to a difference being smaller than a predetermined value, and the fourth signal having a second level in response to the difference being larger than the predetermined value. The fourth circuit to provide a fifth signal, the fifth signal having a first level based at least on the second signal, and the fifth signal having a second level based at least on the second signal and the fourth signal.

Abstract: A power amplifier is provided. The power amplifier includes a first circuit comprising a first transistor and a second transistor coupled respectively to a third transistor and a fourth transistor. The power amplifier also includes a second circuit comprising a transformer having a first winding and a second winding. The first winding comprises a first terminal coupled to the third transistor and a second terminal coupled to the fourth transistor to receive a differential voltage signal with a gain from the first circuit. The second winding comprises a first terminal being grounded and a second terminal serving as an output terminal. The power amplifier circuit further includes a third circuit comprising a programmable capacitor from a midpoint of the first winding to a common node that is coupled to ground. The programmable capacitor is tunable to reduce second harmonic seen at the output terminal.

Abstract: A memory device including a receiving circuit is provided. The receiving circuit of the memory device includes a first path receiving a received signal and outputting the received signal directly as a first corrected signal in a current clock signal, a second path holding or tracking the received signal and outputting a second corrected signal in the current clock signal, wherein the second corrected signal is held in a previous clock signal, a summing circuit summing the first corrected signal and the second corrected signal and outputting a summed received signal, and a decision feedback equalizer comparing the summed received signal with a reference signal to decide equalized data and outputting the equalized data in the current clock signal.

Abstract: A memory device including a receiving circuit is provided. The receiving circuit of the memory device includes a first path receiving a received signal and outputting the received signal directly as a first corrected signal in a current clock signal, a second path holding or tracking the received signal and outputting a second corrected signal in the current clock signal, wherein the second corrected signal is held in a previous clock signal, a summing circuit summing the first corrected signal and the second corrected signal and outputting a summed received signal, and a decision feedback equalizer comparing the summed received signal with a reference signal to decide equalized data and outputting the equalized data in the current clock signal.

Abstract: Disclosed are a data transmission device for modulating the amplitude of a PAM-4 signal using a toggle serializer and a method of operating the same. In accordance with an embodiment of the present disclosure, the data transmission device includes a toggle serializer configured to generate at least one toggle signal by detecting logic level change of first and second signals from a Pulse Amplitude Modulation (PAM) signal including the first and second signals; and a driver configured to modulate an amplitude of the PAM signal by combining the first signal, the second signal, and the at least one toggle signal.

Abstract: Disclosed herein are embodiments of a method for controlling a slave device in a system including a master device and a plurality of groups of slave devices. In one embodiment, the method includes generating, by the master device, a control message containing group data items each corresponding to the respective groups to transmit the control message to a particular group; transmitting, by a slave device included in the particular group, the control message to a next group; extracting, by the slave device, a group data item from the control message after the transmitting the control message; extracting/writing, by the slave device, data from/onto the group data; and transmitting, by the slave device, the group data to the master device after completing the extracting/writing.

Abstract: A first communication device calculates a plurality of data error codes for detecting an error in a plurality of data fields by using the plurality of data fields. The first communication device generates a packet comprising the plurality of data fields and the plurality of data error codes, and then transmits the packet which is generated to a second communication device.

Abstract: A method for a first communication device transmitting data to a second communication device, according to one embodiment of the present invention, comprises the steps of: the first communication device generating a safety unique identifier by using a unique identifier of the first communication device and a unique identifier of the second communication device, in order to confirm the validity of connection between the first communication device and the second communication device; the first communication device calculating a data error detection code for detecting an error by using the safety unique identifier and the data; the first communication device generating a packet comprising the data and the data error detection code; and the first communication device transmitting the packet to the second communication device.

Abstract: To control a gain of a transmit signal in a wireless transmitter, the wireless transmitter is provided. The wireless transmitter includes a baseband processor for processing an analog baseband transmit signal, and a Radio Frequency (RF) signal processor including a plurality of mixers. The plurality of mixers are configured to share an output signal of the baseband processor as an input.

Abstract: A first communication device calculates a data error detection code for detecting an error in data by using the data and a virtual sequence number, and generates a packet comprising the data and the data error detection code. The packet does not include the virtual sequence number which is used for calculating error detection. The first communication device transmits the packet to a second communication device.

Abstract: Disclosed are a data transmission device for modulating the amplitude of a PAM-4 signal using a toggle serializer and a method of operating the same. In accordance with an embodiment of the present disclosure, the data transmission device includes a toggle serializer configured to generate at least one toggle signal by detecting logic level change of first and second signals from a Pulse Amplitude Modulation (PAM) signal including the first and second signals; and a driver configured to modulate an amplitude of the PAM signal by combining the first signal, the second signal, and the at least one toggle signal.

Abstract: An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.

Abstract: A semiconductor device may include a first terminal electrically connected to a first semiconductor chip, a second terminal electrically connected to a second semiconductor chip, which is different from the first semiconductor chip, a first signal line electrically connecting the first terminal and the second terminal and including a first node, a third terminal connected to a tester monitoring a signal transmitted between the first semiconductor chip and the second semiconductor chip, a fourth terminal applied a reference voltage, a second signal line electrically connecting the third terminal and the fourth terminal and including a second node, a first resistor connected between the first node and the second node and a second resistor directly connected to the second node different from the first resistor.

Abstract: Provided are a semiconductor device and an operating method thereof. A semiconductor device includes a mixer configured to upconvert a baseband signal using a local oscillator (LO) signal; and a notch filter configured to receive the upconverted signal from the mixer and filter notch frequency components, the notch filter further configured to resonate at a fundamental frequency to provide a higher impedance and resonate at a notch frequency different from the fundamental frequency to provide a lower impedance.

Abstract: Provided are a semiconductor device and an operating method thereof. A semiconductor device includes a mixer configured to upconvert a baseband signal using a local oscillator (LO) signal; and a notch filter configured to receive the upconverted signal from the mixer and filter notch frequency components, the notch filter further configured to resonate at a fundamental frequency to provide a higher impedance and resonate at a notch frequency different from the fundamental frequency to provide a lower impedance.

Abstract: Disclosed is a PLC system having a plurality of CPU modules and a control method thereof, wherein the method includes ascertaining a clock signal when a count is a count corresponding to a time slot allocated by a master CPU module, generating a clock signal by accessing to a backplane, and ending generation of clock signal at a time when the access to the backplane ends.

Abstract: Disclosed are a temperature compensation apparatus and method. The apparatus includes a reference signal generator that supplies at least one of a first current which is constant regardless of temperature variation and a second current which is proportional to temperature variation, a slope amplifier that determines a first output current having a second temperature coefficient which is a multiple of a first temperature coefficient of the second current, based on the first current and the second current, and a slope controller that determines a second output current having a third temperature coefficient, using a weighted average of the first current and the second current.

Abstract: An access controlling method of a dual port memory system is provided. The method includes: requesting, by a first processor, an access from a dual port memory; and transmitting, by the dual port memory, a result signal according to the access request to the first processor, wherein the result signal includes a first result signal for notifying access success, a second result signal for notifying access failure, and a third result signal for notifying access hold.

Abstract: Provided is a Radio Frequency (RF) communication apparatus and a method for detecting power. The RF communication apparatus includes a receiver that receives a segment value indicating one of multiple transmission output power ranges, a power detector that detects a strength of an RF transmission signal in an output power range corresponding to the segment value, and a transmitter that transmits the strength of the detected RF transmission signal. The power detector includes a feedback unit that receives the fed-back RF transmission signal, an RF core unit that generates a Root Mean Square (RMS) of the RF transmission signal, and a converter that converts a current signal corresponding to the RMS of the RF transmission signal into a voltage signal, and converts the converted voltage signal from a differential signal to a single signal.

Abstract: An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.