Abstract: A coil component includes a body having a first surface and a second surface, opposing each other in a first direction, a first side surface and a second side surface, opposing each other in a second direction, and a third side surface connecting the first side surface and the second side surface to each other, a coil disposed in the body, the coil including a lead-out portion extending to the third side surface of the body, an external electrode disposed on the third side surface of the body, the external electrode including a connection portion connected to the lead-out portion, and a first insulating layer disposed on the third side surface of the body, the first insulating layer exposing the connection portion.

Abstract: A coil component according to an aspect of the present disclosure includes a coil component having a body including a first surface and a second surface opposing each other in a first direction, and a third surface and a fourth surface connecting the first surface to the second surface and opposing each other in a second direction; a coil disposed in the body; an external electrode disposed on the body and connected to the coil; and a first heat dissipation portion disposed on the first surface, wherein the body includes a groove disposed in a region between the first heat dissipation portion and the external electrode.

Abstract: An antenna apparatus may include: first patch antenna patterns arrayed in an N×1 structure, the first patch antenna patterns each having a polygonal shape having an oblique side with respect to an array direction of the N×1 structure; feed vias electrically connected to the first patch antenna patterns; and guide vias arrayed along the oblique side, wherein N is a natural number greater than or equal to 2.

Abstract: An antenna apparatus includes a feed via, a patch antenna pattern which is electrically connected to a first end of the feed via, a plurality of first conductive array patterns, respectively disposed to be spaced apart from the patch antenna pattern and arranged to correspond to at least a portion of a side boundary of the patch antenna pattern, and a first conductive ring pattern spaced apart from the patch antenna pattern and the plurality of conductive array patterns and configured to surround the patch antenna pattern and the plurality of conductive array patterns.

Abstract: A chip antenna module array includes a first chip antenna module including: a first solder layer disposed below a first dielectric layer; a first feed via disposed in the first dielectric layer; a first patch antenna pattern disposed above the first dielectric layer and having a first resonant frequency; and a first coupling pattern spaced apart from the first patch antenna pattern, and not vertically overlapping the first patch antenna pattern. The chip antenna module array includes a second chip antenna module including: a second solder layer disposed below a second dielectric layer; a second feed via disposed in the second dielectric layer; a second patch antenna pattern disposed above the second dielectric layer and having a second resonant frequency; and a second coupling pattern disposed above and vertically overlapping the second patch antenna pattern. The first and second chip antenna modules are disposed spaced apart on a connection member.

Abstract: A chip antenna module array includes a connection member and chip antenna modules mounted on the connection member. Each chip antenna module includes: a first patch antenna dielectric layer; a feed via extending through the first patch antenna dielectric layer; and a patch antenna pattern disposed on an upper surface of the first patch antenna dielectric layer and configured to be fed from the feed via. At least one chip antenna module includes: a ground pattern disposed on a lower surface of the first patch antenna dielectric layer; a chip-antenna feed line including a second part disposed on a lower surface of the ground pattern, and electrically connecting a connection member feed line to the feed via; a first feed line dielectric layer disposed on a lower surface of the second part; and a solder layer disposed on a lower surface of the first feed line dielectric layer.

Abstract: A chip antenna module array includes a first chip antenna module including: a first solder layer disposed below a first dielectric layer; a first feed via disposed in the first dielectric layer; a first patch antenna pattern disposed above the first dielectric layer and having a first resonant frequency; and a first coupling pattern spaced apart from the first patch antenna pattern, and not vertically overlapping the first patch antenna pattern. The chip antenna module array includes a second chip antenna module including: a second solder layer disposed below a second dielectric layer; a second feed via disposed in the second dielectric layer; a second patch antenna pattern disposed above the second dielectric layer and having a second resonant frequency; and a second coupling pattern disposed above and vertically overlapping the second patch antenna pattern. The first and second chip antenna modules are disposed spaced apart on a connection member.

Abstract: An antenna module includes: an IC package including an IC; first and second antenna portions including respective patch antenna patterns, respective feed vias connected to the respective patch antenna patterns, and respective dielectric layers surrounding the respective feed vias; and a connection member having an upper surface on which the first and second antenna portions are disposed and a lower surface on which the IC package is disposed, the connection member forming an electrical connection path between the IC and the feed via of the first antenna portion and an electrical connection path of the second antenna portion. The connection member includes a first region disposed between the IC package and the first antenna portion, a second region on which the second antenna portion is disposed, and a third region electrically connecting the first and second regions and being more flexible than the dielectric layer of the first antenna portion.

Abstract: An antenna apparatus includes: a feed via; a patch antenna pattern electrically connected to one end of the feed via; a ground layer disposed in a position vertically lower than a position of the patch antenna pattern, and having a through-hole through which the feed via passes; a first conductive ring pattern laterally spaced apart from the patch antenna pattern, and having a first through region laterally surrounding the patch antenna pattern; and a second conductive ring pattern disposed in a position vertically higher than a position of the first conductive ring pattern, and having a second through region laterally surrounding the patch antenna pattern, wherein an area of the second through region is greater than an area of the first through region.

Abstract: An antenna apparatus includes a ground layer, patch antenna patterns, feed vias, ring-type meta patterns, and coupling-type meta patterns. The ground layer has one or more through-holes. Patch antenna patterns are each disposed above the ground layer. Feed vias are disposed to penetrate through the one or more through-holes, and electrically connect to the patch antenna patterns, respectively. Ring-type meta patterns are arranged between the patch antenna patterns. Coupling-type meta patterns are alternately arranged between the patch antenna patterns in fewer numbers than the ring-type meta patterns in positions more distant from the patch antenna patterns than positions in which the ring-type meta patterns are arranged.

Abstract: A chip antenna module array includes a first chip antenna module including: a first solder layer disposed below a first dielectric layer; a first feed via disposed in the first dielectric layer; a first patch antenna pattern disposed above the first dielectric layer and having a first resonant frequency; and a first coupling pattern spaced apart from the first patch antenna pattern, and not vertically overlapping the first patch antenna pattern. The chip antenna module array includes a second chip antenna module including: a second solder layer disposed below a second dielectric layer; a second feed via disposed in the second dielectric layer; a second patch antenna pattern disposed above the second dielectric layer and having a second resonant frequency; and a second coupling pattern disposed above and vertically overlapping the second patch antenna pattern. The first and second chip antenna modules are disposed spaced apart on a connection member.

Abstract: An antenna apparatus may include: a feed via; a patch antenna pattern electrically connected to the feed via; and coupling patterns spaced apart from the patch antenna pattern and spaced apart from each other. At least one of the coupling patterns may protrude in a direction in which the at least one of the coupling patterns is spaced apart from the patch antenna pattern.

Abstract: An antenna module includes: an IC package including an IC; first and second antenna portions including respective patch antenna patterns, respective feed vias connected to the respective patch antenna patterns, and respective dielectric layers surrounding the respective feed vias; and a connection member having an upper surface on which the first and second antenna portions are disposed and a lower surface on which the IC package is disposed, the connection member forming an electrical connection path between the IC and the feed via of the first antenna portion and an electrical connection path of the second antenna portion. The connection member includes a first region disposed between the IC package and the first antenna portion, a second region on which the second antenna portion is disposed, and a third region electrically connecting the first and second regions and being more flexible than the dielectric layer of the first antenna portion.

Abstract: A chip antenna includes: a first dielectric layer; a second dielectric layer upwardly spaced apart from the first dielectric layer; a patch antenna pattern disposed on the second dielectric layer; a feed via extending through the first dielectric layer; a feed pattern disposed between the first and second dielectric layers, electrically connected to the feed via, and spaced apart from the patch antenna pattern; and an adhesive layer adhered to the first and second dielectric layers. The adhesive layer includes a cavity surrounding the feed pattern between the first and second dielectric layers and; and a vent disposed between the cavity and an external side surface of the adhesive layer.

Abstract: An antenna apparatus includes patch antennas arranged in an N×1 array, first feed vias, second feed vias, third feed vias, and fourth feed vias connected to a point offset from a center of each of the patch antennas, in a first direction, second direction, third direction, and fourth direction, respectively a first RF signal of a first phase passes through the first feed vias and the second feed vias, a second RF signal of a second phase passes through the third feed vias and the fourth feed vias, and wherein a line between the point in the first direction and the point in the second direction is oblique to a direction of an array of the patch antennas, and a line between the point in the third direction and the point in the fourth direction is oblique to the direction of the array.

Abstract: A chip antenna module includes a first dielectric layer; a solder layer disposed on a first surface of the first dielectric layer; a patch antenna pattern disposed on a second surface of the first dielectric layer; a coupling pattern disposed on the second surface of the first dielectric layer, and spaced apart from the patch antenna pattern without overlapping the patch antenna pattern in a thickness direction; a first feed via extending through the first dielectric layer in the thickness direction so as not to overlap the patch antenna pattern and the coupling pattern in the thickness direction; a first feed pattern extending from a first end of the first feed to overlap at least a portion of the coupling pattern; and a second feed pattern extending from a second end of the first feed via to overlap at least a portion of the coupling pattern.

Abstract: A double loop antenna includes a source loop comprising: a spiral-shaped conductive source coil pattern disposed on a top surface of a board, and a source capacitor pattern comprising symmetrical conductive patterns disposed on the top surface and a bottom surface of the board; and a resonance loop comprising: a spiral-shaped conductive resonance coil pattern disposed on the bottom surface of the board, and a resonance capacitor pattern comprising symmetrical conductive patterns disposed on the top surface and the bottom surface of the board, wherein the source coil pattern and the resonance coil pattern are formed on different surfaces of the board.

Abstract: An antenna apparatus includes a ground layer having a through-hole; a feed via disposed to pass through the through-hole; a patch antenna pattern disposed on the ground layer and electrically connected to one end of the feed via; a first coupling patch pattern disposed on the patch antenna pattern; a second coupling patch pattern disposed between the first coupling patch pattern and the patch antenna pattern; and a dielectric layer disposed in at least of a portion a space between the first coupling patch pattern and the second coupling patch pattern so that a dielectric constant of at least a portion of a space between the patch antenna pattern and the second coupling patch pattern is lower than a dielectric constant of the space between the first coupling patch portion and the second coupling patch pattern.

Abstract: A chip antenna module array includes a connection member and chip antenna modules mounted on the connection member. Each chip antenna module includes: a first patch antenna dielectric layer; a feed via extending through the first patch antenna dielectric layer; and a patch antenna pattern disposed on an upper surface of the first patch antenna dielectric layer and configured to be fed from the feed via. At least one chip antenna module includes: a ground pattern disposed on a lower surface of the first patch antenna dielectric layer; a chip-antenna feed line including a second part disposed on a lower surface of the ground pattern, and electrically connecting a connection member feed line to the feed via; a first feed line dielectric layer disposed on a lower surface of the second part; and a solder layer disposed on a lower surface of the first feed line dielectric layer.

Abstract: A chip antenna module includes a first dielectric layer; a solder layer disposed on a first surface of the first dielectric layer; a patch antenna pattern disposed on a second surface of the first dielectric layer; a coupling pattern disposed on the second surface of the first dielectric layer, and spaced apart from the patch antenna pattern without overlapping the patch antenna pattern in a thickness direction; a first feed via extending through the first dielectric layer in the thickness direction so as not to overlap the patch antenna pattern and the coupling pattern in the thickness direction; a first feed pattern extending from a first end of the first feed to overlap at least a portion of the coupling pattern; and a second feed pattern extending from a second end of the first feed via to overlap at least a portion of the coupling pattern.